Datasheet

AD7880
–4–
REV. 0
PIN FUNCTION DESCRIPTION
Pin Pin
No. Mnemonic Function
1V
INA
Analog Input.
2V
INB
Analog Input.
3 AGND Analog Ground.
4V
REF
Voltage Reference Input. This is normally tied to V
DD
.
5
CS Chip Select. Active Low Logic input. The device is selected when this input is active.
6
CONVST Convert Start. A low to high transition on this input puts the track/hold into hold mode and starts con-
version. This input is asynchronous to the CLKIN and is independent of
CS and RD.
7
RD Read. Active Low Logic Input. This input is used in conjunction with CS low to enable data outputs.
8
BUSY Active Low Logic Output. This status line indicates converter status. BUSY is low during conversion.
9 CLKIN Clock Input. TTL-compatible logic input. Used as the clock source for the A/D converter. The mark/
space ratio of the clock can vary from 40/60 to 60/40.
10 DGND Digital Ground.
11 . . . 22 DB0–DB11 Three-State Data Outputs. These become active when
CS and RD are brought low.
23 MODE MODE Input. This input is used to put the device into the power save mode (MODE = 0 V). During
normal operation, the MODE input will be a logic high (MODE = V
DD
).
24 V
DD
Power Supply. This is nominally +5 V.
ORDERING GUIDE
Bipolar
Full-Scale Zero
Temperature Error Error Package
Model Range (LSBs) (LSBs) Option*
AD7880BN –40°C to +85°C ±15 ±10 N-24
AD7880BQ –40°C to +85°C ±15 ±10 Q-24
AD7880CN –40°C to +85°C ±5 ±5 N-24
AD7880CQ –40°C to +85°C ±5 ±5 Q-24
AD7880BR –40°C to +85°C ±15 ±10 R-24
AD7880CR –40°C to +85°C ±5 ±5 R-24
*N = Plastic DIP; Q = Cerdip; R = SOIC (Small Outline Integrated Circuit).
PIN CONFIGURATION
TOP VIEW
(Not to Scale)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
24
23
22
21
20
19
18
17
16
15
AD7880
AGND
CLKIN
DGND
DB0
DB1 DB2
DB3
DB4
DB5
DB6
V
DD
DB8
V
INA
V
INB
DB7
DB9
DB10
DB11
MODE
CS
CONVST
RD
BUSY
V
REF