Datasheet

AD7879/AD7889
Rev. C | Page 5 of 40
I
2
C TIMING SPECIFICATIONS (AD7879-1/AD7889-1)
V
CC
= 1.6 V to 3.6 V, T
A
= −40°C to +85°C, unless otherwise noted. Sample tested at 25°C to ensure compliance. All input signals are
timed from a voltage level of 1.4 V.
Table 3.
Parameter
1
Limit Unit Description
f
SCL
400 kHz max
t
1
0.6 µs min Start condition hold time, t
HD; STA
t
2
1.3 µs min Clock low period, t
LOW
t
3
0.6 µs min Clock high period, t
HIGH
t
4
100 ns min Data setup time, t
SU; DAT
t
5
300 ns min Data hold time, t
HD; DAT
t
6
0.6 µs min Stop condition setup time, t
SU; STO
t
7
0.6 µs min Start condition setup time, t
SU; STA
t
8
1.3 µs min Bus-free time between stop and start conditions, t
BUF
t
R
300 ns max Clock/data rise time
t
F
300 ns max Clock/data fall time
1
Guaranteed by design; not production tested.
07667-003
SCL
SDA
t
R
t
F
t
2
t
5
t
1
t
3
t
4
STOP START STOPSTART
t
7
t
6
t
1
t
8
Figure 3. Detailed I
2
C Timing Diagram