Datasheet

REV. C
–2–
AD7874–SPECIFICATIONS
(V
DD
= +5 V, V
SS
= –5 V, AGND = DGND = 0 V, REF IN = +3 V, f
CLK
= 2.5 MHz
external. All specifications T
MIN
to T
MAX
unless otherwise noted.)
Parameter A Version B Version S Version Units Test Conditions/Comments
SAMPLE-AND-HOLD
Acquisition Time
2
to 0.01% 2 2 2 µs max
Droop Rate
2, 3
1 1 2 mV/ms max
–3 dB Small Signal Bandwidth
3
500 500 500 kHz typ V
IN
= 500 mV p-p
Aperture Delay
2
0 0 0 ns min
40 40 40 ns max
Aperture Jitter
2, 3
200 200 200 ps typ
Aperture Delay Matching
2
4 4 4 ns max
SAMPLE-AND-HOLD AND ADC
DYNAMIC PERFORMANCE
Signal-to-Noise Ratio 70 71 70 dB min f
IN
= 10 kHz Sine Wave, f
SAMPLE
= 29 kHz
Total Harmonic Distortion –78 –80 –78 dB max f
IN
= 10 kHz Sine Wave, f
SAMPLE
= 29 kHz
Peak Harmonic or Spurious Noise –78 –80 –78 dB max f
IN
= 10 kHz Sine Wave, f
SAMPLE
= 29 kHz
Intermodulation Distortion fa = 9 kHz, fb = 9.5 kHz, f
SAMPLE
= 29 kHz
2nd Order Terms –80 –80 –80 dB max
3rd Order Terms –80 –80 –80 dB max
Channel-to-Channel Isolation
2
–80 –80 –80 dB max
DC ACCURACY
Resolution 12 12 12 Bits
Relative Accuracy ±1 ±1/2 ±1 LSB max
Differential Nonlinearity ±1 ±1 ±1 LSB max No Missing Codes Guaranteed
Positive Full-Scale Error
4
±5 ±5 ±5 LSB max Any Channel
Negative Full-Scale Error
4
±5 ±5 ±5 LSB max Any Channel
Full-Scale Error Match 5 5 5 LSB max Between Channels
Bipolar Zero Error ±5 ±5 ±5 LSB max Any Channel
Bipolar Zero Error Match 4 4 4 LSB max Between Channels
ANALOG INPUTS
Input Voltage Range ±10 ±10 ±10 Volts
Input Current ±600 ±600 ±600 µA max
REFERENCE OUTPUTS
REF OUT 333V nom
REF OUT Error @ +25°C ±0.33 ±0.33 ±0.33 % max
T
MIN
to T
MAX
±1 ±1 ±1 % max
REF OUT Temperature Coefficient ±35 ±35 ±35 ppm/°C typ
Reference Load Change ±1 ±1 ±2 mV max Reference Load Current Change (0–500 µA)
Reference Load Should Not Be Changed During Conversion
REFERENCE INPUT
Input Voltage Range 2.85/3.15 2.85/3.15 2.85/3.15 V min/V max 3 V ± 5%
Input Current ±1 ±1 ±1 µA max
Input Capacitance
3
10 10 10 pF max
LOGIC INPUTS
Input High Voltage, V
INH
2.4 2.4 2.4 V min V
DD
= 5 V ± 5%
Input Low Voltage, V
INL
0.8 0.8 0.8 V max V
DD
= 5 V ± 5%
Input Current, I
IN
±10 ±10 ±10 µA max V
IN
= 0 V to V
DD
Input Capacitance, C
IN
3
10 10 10 pF max
LOGIC OUTPUTS
Output High Voltage, V
OH
4.0 4.0 4.0 V min V
DD
= 5 V ± 5%; I
SOURCE
= 40 µA
Output Low Voltage, V
OL
0.4 0.4 0.4 V max V
DD
= 5 V ± 5%; I
SINK
= 1–6 mA
DB0–DB11
Floating-State Leakage Current ±10 ±10 ±10 µA max V
IN
= 0 V to V
DD
Floating-State Output Capacitance 10 10 10 pF max
Output Coding 2s COMPLEMENT
POWER REQUIREMENTS
V
DD
+5 +5 +5 V nom ±5% for Specified Performance
V
SS
–5 –5 –5 V nom ±5% for Specified Performance
I
DD
18 18 18 mA max CS = RD = CONVST = +5 V; Typically 12 mA
I
SS
12 12 12 mA max CS = RD = CONVST = +5 V; Typically 8 mA
Power Dissipation 150 150 150 mW max CS = RD = CONVST = +5 V; Typically 100 mW
NOTES
1
Temperature ranges are as follows: A, B Versions: –40°C to +85°C; S Version: –55°C to +125°C.
2
See Terminology.
3
Sample tested @ +25°C to ensure compliance.
4
Measured with respect to the REF IN voltage and includes bipolar offset error.
5
For capacitive loads greater than 50 pF a series resistor is required.
Specifications subject to change without notice.