Datasheet
AD7873 Data Sheet
Rev. F | Page 14 of 28
ANALOG INPUT
Figure 26 shows an equivalent circuit of the analog input
structure of the AD7873 that contains a block diagram of the
input multiplexer, the differential input of the ADC, and the
differential reference.
Table 6 shows the multiplexer address corresponding to each
analog input, both for the SER/
DFR
bit in the control register
set high and low. The control bits are provided serially to the
device via the DIN pin. For more information on the control
register, see the Control Register section.
When the converter enters hold mode, the voltage difference
between the +IN and –IN inputs (see Figure 26) is captured on
the internal capacitor array. The input current on the analog
inputs depends on the conversion rate of the device. During the
sample period, the source must charge the internal sampling
capacitor (typically 37 pF). Once the capacitor is fully charged,
there is no further input current. The rate of charge transfer
from the analog source to the converter is a function of
conversion rate.
Figure 26. Equivalent Analog Input Circuit
Table 6. Analog Input, Reference, and Touch Screen Control
A2 A1 A0
SER/
DFR
Analog Input X Switches Y Switches +REF
1
–REF
1
0 0 0 1 TEMP0 Off Off V
REF
GND
0 0 1 1 X+ Off On V
REF
GND
0 1 0 1 VBAT Off Off V
REF
GND
0 1 1 1 X+ (Z1) X+ Off Y+ On V
REF
GND
X– On Y– Off
1
0
0
1
Y– (Z2)
X+ Off
Y+ On
V
REF
GND
X– On Y– Off
1 0 1 1 Y+ On Off V
REF
GND
1 1 0 1 AUX Off Off V
REF
GND
1 1 1 1 TEMP1 Off Off V
REF
GND
0 0 0 0
Invalid Address. Test Mode: Switches out the TEMP0 diode to the
PENIRQ
pin.
0 0 1 0 X+ Off On Y+ Y–
0
1
0
0
Invalid Address
0 1 1 0 X+ (Z1) X+ Off Y+ On Y+ X–
X– On Y– Off
1 0 0 0 Y– (Z2) X+ Off Y+ On Y+ X–
X– On Y– Off
1 0 1 0 Y+ ON Off X+ X–
1 1 0 0
Outputs Identity Code, 1000 0000 0000.
1
1
1
0
Invalid address. Test mode: Switches out the TEMP1 diode to the
PENIRQ
pin.
1
Internal node, not directly accessible by the user.
X+ Y+
REF
INT/
EXT
X– Y– GND
6-TO-1
MUX
3-TO-1
MUX
3-TO-1
MUX
IN+
IN+
IN– REF–
REF+
ADC CORE DATA OUT
V
CC
Y–
Y+
X+
X–
ON-CHIP SWITCHES
X+
Y+
Y–
V
BAT
AUX
TEMP
02164-026