Datasheet

AD7869
–13–
IN OUT
GND
5V
V
+
IC5
78L05
C2
0.1µF
C23
10µF
DGND
LDAC
CONVST
INOUT
GND
V–
RO ADC
RI DAC
RO DAC
CONTROL
CLK
AGND
DGND
RCLK
DR
TCLK
RFS
TFS
DT
5V
LK1
LK4
A
B
C
A
B
C
LK5
LK6
A
B
C
LK7
LK8
AD711
ANALOG INPUT
±3V RANGE
ANALOG OUTPUT
±3V RANGE
LK2
V
SS
COMPONENT
GRID
LK3
A
B
C
A
B
C
A
B
C
ABC
IC2
SKT1
SKT2
LDAC
SKT3
CONVST
SKT4
A
B
CLR
5V
C
EXT
Q
5V
GND
IC8 1/2
74HC221
AGND
V
+
R3
4.7k
Ω
R4
2k
Ω
R5
4.7k
Ω
5V
DR
RCLK
RFS
TFS
TCLK
DT
DGND
SKT6
9-WAY D-TYPE
CONNECTOR
LK9
IC7 1/2
74HC4050
SKT5
EXT CLK
IC6
79L05
+
C6
0.1µF
C5
10µF
C8
0.1µF
C7
10µF
V
OUT
C4
0.1µF
C3
10µF
COMPONENT
GRID
C10
0.1µF
C9
10µF
V
+
AD711
IC3
+
V–
C12
0.1µF
C11
10µF
IC4
ADG201HS
R1
2k
Ω
C21
330pF
R2
2k
Ω
IC1
AD7869
C24
0.1µF
R7
200
C1
10µF
R6
15k
C22
68pF
5V
–
5V
–
5V
–
V
–
V
SS
V
CC
R
EXT
/C
EXT
V
DD
V
DD
V
IN
Figure 19. Input/Output Circuit Based on the AD7869
LK5, ADC Internal Clock Selection
This link configures the ADC for continuous or noncontinuous
internal clock operation.
LK6, DAC Updating
The DAC, LDAC input may asserted independently of the
ADC
CONVST signal or it may be tied to CONVST or it may
tied to GND.
LK7, ADC Clock Source
This link provides the option for the ADC to use its own inter-
nal clock oscillator or an external TTL compatible clock.
LK8 Frame Synchronous Option
LK8 provides the option of tying the ADC RFS output to the
DAC
TFS input.
LK9 Transmit/Receive Clock Option
LK9 provides the option to connect the ADC RCLK to the
DAC TCLK.
2 431 5
6 7 8 9
RCLK
TCLK
DT
DR
DGND
NC
5V
TFS
RFS
NC = NO CONNECT
Figure 20. SKT6, D-Type Connector Pinout
REV. B