Datasheet

AD7843
Rev. B | Page 3 of 20
SPECIFICATIONS
V
CC
= 2.7 V to 3.6 V, V
REF
= 2.5 V, f
SCLK
= 2 MHz, T
A
= −40°C to +85°C, unless otherwise noted.
Table 1.
Parameter AD7843A
1
Unit Test Conditions/Comments
DC ACCURACY
Resolution 12 Bits
No Missing Codes 11 Bits min
Integral Nonlinearity
2
±2 LSB max
Offset Error
2
±6 LSB max V
CC
= 2.7 V
Offset Error Match
3
1 LSB max
0.1 LSB typ
Gain Error
2
±4 LSB max
Gain Error Match
3
1 LSB max
0.1 LSB typ
Power Supply Rejection 70 dB typ
SWITCH DRIVERS
On-Resistance
2
Y+, X+ 5 Ω typ
Y−, X− 6 Ω typ
ANALOG INPUT
Input Voltage Ranges 0 to V
REF
V
DC Leakage Current ±0.1 µA typ
Input Capacitance 37 pF typ
REFERENCE INPUT
V
REF
Input Voltage Range 1.0/+V
CC
V min/max
DC Leakage Current ±1 µA max
V
REF
Input Impedance 5 GΩ typ
CS
= GND or +V
CC
V
REF
Input Current
3
20 µA max 8 µA typ
1 µA typ f
SAMPLE
= 12.5 kHz
1 µA max
CS
= +V
CC
; 0.001 µA typ
LOGIC INPUTS
Input High Voltage, V
INH
2.4 V min
Input Low Voltage, V
INL
0.4 V max
Input Current, I
IN
±1 µA max Typically 10 nA, V
IN
= 0 V or +V
CC
Input Capacitance, C
IN
4
10 pF max
LOGIC OUTPUTS
Output High Voltage, V
OH
V
CC
− 0.2 V min I
SOURCE
= 250 µA; V
CC
= 2.2 V to 5.25 V
Output Low Voltage, V
OL
0.4 V max I
SINK
= 250 µA
PENIRQ Output Low Voltage, V
OL
0.4 V max I
SINK
= 250 µA; 100 kW pull-up
Floating-State Leakage Current ±10 µA max
Floating-State Output Capacitance
4
10 pF max
Output Coding Straight (Natural) Binary
CONVERSION RATE
Conversion Time 12 DCLK Cycles max
Track-and-Hold Acquisition Time 3 DCLK Cycles min
Throughput Rate 125 kSPS max
Footnotes on next page.