Datasheet
AD7841
–8–
Unipolar Configuration
Figure 2 shows the AD7841 in the unipolar binary circuit
configuration. The V
REF
(+) input of the DAC is driven by the
AD586, a 5 V reference. V
REF
(–) is tied to ground. Table II
gives the code table for unipolar operation of the AD7841.
Other suitable references include the REF02, a precision 5 V
reference, and the REF195, a low dropout, micropower preci-
sion 5 V reference.
AD7841*
V
DD
V
CC
V
REF
(+)
V
OUT
DUTGND
GND
V
SS
V
REF
(–)
SIGNAL
GND
–15V
V
OUT
(0 TO +10V)
+5V+15V
AD586
R1
10k
2
6
5
4
8
C1
1F
SIGNAL
GND
*ADDITIONAL PINS OMITTED FOR CLARITY
Figure 2. Unipolar 10 V Operation
Offset and gain may be adjusted in Figure 2 as follows: To
adjust offset, disconnect the V
REF
(–) input from 0 V, load the
DAC with all 0s and adjust the V
REF
(–) voltage until V
OUT
= 0 V.
For gain adjustment, the AD7841 should be loaded with all 1s
and R1 adjusted until V
OUT
= 2 V
REF
(+) – 1 LSB = 10 V(16383/
16384) = 9.99939 V.
Many circuits will not require these offset and gain adjustments.
In these circuits R1 can be omitted. Pin 5 of the AD586 may be
left open circuit and Pin 2 (V
REF
(–)) of the AD7841 tied to 0 V.
Table II. Code Table for Unipolar Operation
Binary Number in DAC Register Analog Output
MSB LSB (V
OUT
)
11 1111 1111 1111 2 V
REF
(16383/16384) V
10 0000 0000 0000 2 V
REF
(8192/16384) V
01 1111 1111 1111 2 V
REF
(8191/16384) V
00 0000 0000 0001 2 V
REF
(1/16384) V
00 0000 0000 0000 0 V
NOTES
V= V
REF
(+); V
REF
(–) = 0 V for unipolar operation.
For V
REF
(+) = 5 V, 1 LSB = 10 V/2
14
= 10 V/16384 = 610 µV.
Bipolar Configuration
Figure 3 shows the AD7841 set up for ±10 V operation. The
AD588 provides precision ±5 V tracking outputs that are fed to
the V
REF
(+) and V
REF
(–) inputs of the AD7841. The code table
for bipolar operation of the AD7841 is shown in Table III.
In Figure 3, full-scale and bipolar zero adjustments are provided
by varying the gain and balance on the AD588. R2 varies the
gain on the AD588 while R3 adjusts the offset of both the +5 V
and –5 V outputs together with respect to ground.
For bipolar-zero adjustment, the DAC is loaded with
1000...0000 and R3 is adjusted until V
OUT
= 0 V. Full scale
is adjusted by loading the DAC with all 1s and adjusting R2
until V
OUT
= 10(8191/8192) V = 9.99878 V.
When bipolar-zero and full-scale adjustment are not needed, R2
and R3 can be omitted. Pin 12 on the AD588 should be con-
nected to Pin 11 and Pin 5 should be left floating.
AD7841*
V
DD
V
CC
V
REF
(+)
V
OUT
DUTGND
GND
V
SS
V
REF
(–)
SIGNAL
GND
–15V
V
OUT
(–10V TO +10V)
+5V+15V
*ADDITIONAL PINS OMITTED FOR CLARITY
R1
39k
C1
1F
R2
100k
R3
100k
AD588
46
2
3
1
14
15
16
7
9
5
10
11
12 8 13
Figure 3. Bipolar
±
10 V Operation
Table III. Code Table for Bipolar Operation
Binary Number in DAC
Register Analog Output
MSB LSB (V
OUT
)
11 1111 1111 1111 2[V
REF
(–) + V
REF
(16383/16384)] V
10 0000 0000 0001 2[V
REF
(–) + V
REF
(8193/16384)] V
10 0000 0000 0000 2[V
REF
(–) + V
REF
(8192/16384)] V
01 1111 1111 1111 2[V
REF
(–) + V
REF
(8191/16384)] V
00 0000 0000 0001 2[V
REF
(–) + V
REF
(1/16384)] V
00 0000 0000 0000 2[V
REF
(–)] V
NOTES
V
REF
= (V
REF
(+) – V
REF
(–)).
For V
REF
(+) = +5 V, and V
REF
(–) = –5 V, V
REF
= 10 V, 1 LSB = 2 V
REF
V/2
14
=
20 V/16384 = 1.22 mV.
CONTROLLED POWER-ON OF THE OUTPUT STAGE
A block diagram of the output stage of the AD7841 is shown in
Figure 4. It is capable of driving a load of 5 kΩ in parallel with
50 pF. G
1
to G
6
are transmission gates used to control the
power on voltage present at V
OUT
. On power up G
1
and G
2
are
also used in conjunction with the CLR input to set V
OUT
to the
user defined voltage present at the DUTGND pin. When CLR
is taken back high, the DAC outputs reflect the data in the
DAC registers.
G
1
G
2
G
4
G
3
G
6
G
5
DUTGND
V
OUT
R
R = 60k
14k
DAC
Figure 4. Block Diagram of AD7841 Output Stage
REV. B