Datasheet

ManualsBrandsANALOG DEVICES ManualsData collecting ICsData acquisition IC - DA converter (DAC) MQFP 44

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AD7839

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781/329-4700 World Wide Web Site: http://www.analog.com

Fax: 781/326-8703 © Analog Devices, Inc., 1999

Octal 13-Bit, Parallel Input,

Voltage-Output DAC

FUNCTIONAL BLOCK DIAGRAM

DAC

REG

INPUT

REG

DAC E

AD7839

DB12

DB0

LDAC

13 13

DAC

REG

INPUT

REG

13 13

DAC

REG

INPUT

REG

13 13

DAC

REG

INPUT

REG

13 13

DAC

REG

INPUT

REG

13 13

DAC

REG

INPUT

REG

13 13

DAC

REG

INPUT

REG

13 13

DAC

REG

INPUT

REG

13 13

DAC D

DAC C

DAC F

DAC B

DAC A

DAC G

DAC H

REF

(+)

REF

(–)

DUTGND

OUT

DUTGND

REF

(–)

CDEF

REF

(+)

CDEF

REF

(–)

REF

(+)

GND

CLR

ADDRESS

DECODE

FEATURES

Eight 13-Bit DACs in One Package

Voltage Outputs

Offset Adjust for Each DAC Pair

Reference Range of ⴞ5 V

Maximum Output Voltage Range of ⴞ10 V

Clear Function to User-Defined Voltage

44-Lead MQFP Package

APPLICATIONS

Automatic Test Equipment

Process Control

General Purpose Instrumentation

GENERAL DESCRIPTION

The AD7839 contains eight 13-bit DACs on one monolithic

chip. It has output voltages with a full-scale range of ±10 V

from reference voltages of ±5 V.

The AD7839 accepts 13-bit parallel loaded data from the exter-

nal bus into one of the input registers under the control of the

WR, CS and DAC channel address pins, A0–A2.

The DAC outputs are updated on reception of new data into

the DAC registers. All the outputs may be updated simulta-

neously by taking the LDAC input low.

Each DAC output is buffered with a gain-of-two amplifier into

which an external DAC offset voltage can be inserted via the

DUTGNDx pins.

The AD7839 is available in a 44-lead MQFP package.

Summary of content (12 pages)

PAGE 1
a Octal 13-Bit, Parallel Input, Voltage-Output DAC AD7839 FEATURES Eight 13-Bit DACs in One Package Voltage Outputs Offset Adjust for Each DAC Pair Reference Range of ⴞ5 V Maximum Output Voltage Range of ⴞ10 V Clear Function to User-Defined Voltage 44-Lead MQFP Package GENERAL DESCRIPTION The AD7839 contains eight 13-bit DACs on one monolithic chip. It has output voltages with a full-scale range of ± 10 V from reference voltages of ± 5 V.
PAGE 2
(VCC = +5 V ⴞ 5%; VDD = +15 V ⴞ 5%; VSS = –15 V ⴞ 5%; GND = DUTGND = 0 V; 1 L L A = TMIN to TMAX, unless otherwise noted.) AD7839–SPECIFICATIONS R = 5 k⍀ and C = 50 pF to GND, T Parameter A Version Units 13 ±2 ± 0.9 ±4 ±4 ±1 0.
PAGE 3
AD7839 (These characteristics are included for Design Guidance and are not subject AC PERFORMANCE CHARACTERISTICS to production testing.) Parameter A Units Test Conditions/Comments µs typ µs max V/µs typ nV-s typ Full-Scale Change to ± 1/2 LSB. DAC Latch Contents Alternately Loaded with All 0s and All 1s Slew Rate Digital-to-Analog Glitch Impulse 30 40 0.7 230 Channel-to-Channel Isolation DAC-to-DAC Crosstalk Digital Crosstalk 99 40 0.
PAGE 4
AD7839 ABSOLUTE MAXIMUM RATINGS 1, 2 Lead Temperature, Soldering Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . +215°C Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . +220°C ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >4000 V (TA = +25°C unless otherwise noted) VCC to GND3 . . . . . . . . . . . . . . .–0.3 V, +7 V or VDD + 0.3 V (Whichever Is Lower) VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.
PAGE 5
AD7839 PIN FUNCTION DESCRIPTIONS Pin No. Mnemonic Description 1 DUTGND_AB 2, 44, 43, 41, 37, 35, 34, 32 4, 3 5 6 7 VOUTA . . VOUTH Device Sense Ground for DACs A and B. VOUTA and VOUTB are referenced to the voltage applied to this pin. DAC Outputs. 10, 9, 8 A0, A1, A2 11 12 CS WR 13 14 15–27 VCC GND DB0␣ .␣ .␣ DB12 28 CLR 30, 31 33 VREF(+)GH, VREF(–)GH DUTGND_GH 36 DUTGND_EF 39 40 42 VREF(+)CDEF VREF(–)CDEF DUTGND_CD REV.
PAGE 6
AD7839 TERMINOLOGY Relative Accuracy Full-Scale Error This is the error in DAC output voltage when all 1s are loaded into the DAC latch. Ideally the output voltage, with all 1s loaded into the DAC latch, should be 2 VREF(+) – 1 LSB. Relative accuracy or endpoint linearity is a measure of the maximum deviation from a straight line passing through the endpoints of the DAC transfer function.
PAGE 7
Typical Performance Characteristics– AD7839 1.0 0.25 0.0 –0.25 1.0 0.25 0.0 VDD = +15V VSS = –15V VREF(+) = +5V VREF(–) = –5V TA = +258C –0.25 –0.50 –0.75 –1.0 2048 4096 CODE 6144 8191 0 Figure 2. Typical INL Plot 2.0 1.5 1.0 0.0 –0.5 0.25 0 –0.25 4096 CODE 6144 8192 –2.0 –40 –0.75 –1.5 80 100 VCC = +5V VDD = +15V VSS = –15V 5 FULL-SCALE ERROR 4 0 –1.0 0 20 40 60 TEMPERATURE – 8C 6 –0.5 MIN DNL –20 Figure 4. Typical INL Error vs. Temperature 0.5 –0.50 MIN INL –1.
PAGE 8
AD7839 When bipolar-zero and full-scale adjustment are not needed, R2 and R3 can be omitted. Pin 12 on the AD588 should be connected to Pin 11 and Pin 5 should be left floating. Unipolar Configuration Figure 11 shows the AD7839 in the unipolar binary circuit configuration. The VREF(+) input of the DAC is driven by the AD586, a +5 V reference. VREF(–) is tied to ground. Table II gives the code table for unipolar operation of the AD7839.
PAGE 9
AD7839 Power-On with CLR Low G1 The output stage of the AD7839 has been designed to allow output stability during power-on. If CLR is kept low during power-on, then just after power is applied to the AD7839, the situation is as depicted in Figure 14. G1, G4 and G6 are open while G2, G3 and G5 are closed. G6 DAC VOUT G3 G2 G4 R G1 R G5 14kV G6 DAC VOUT G3 G2 G4 R DUTGND Figure 16.
PAGE 10
AD7839 DUTGND Voltage Range During power-on, the VOUT pins of the AD7839 are connected to the relevant DUTGND pins via G5 and the 14 kΩ thin-film resistor. The DUTGND potential must obey the max ratings at all times. Thus, the voltage at DUTGND must always be within the range VSS – 0.3 V, VDD + 0.3 V.
PAGE 11
AD7839 Automated Test Equipment The AD7839 is particularly suited for use in an automated test environment. Figure 21 shows the AD7839 providing the necessary voltages for the pin driver and the window comparator in a typical ATE pin electronics configuration. AD588s are used to provide reference voltages for the AD7839. In the configuration shown, the AD588s are configured so that the voltage at Pin 1 is 5 V greater than the voltage at Pin 9 and the voltage at Pin 15 is 5 V less than the voltage at Pin 9.
PAGE 12
AD7839 digital signals driving the DACs need to be level-shifted from the 0 V to +5 V range to the –5 V to 0 V range. Figure 22 shows a typical application circuit to provide programmable reference capabilities for the AD7839. these DACs can be operated with supplies of 0 V and –5 V, with the VDD pin connected to 0 V and the GND pin connected to –5 V. Now these can be used to provide the negative reference voltages for the VREF(–) inputs on the AD7839.