Datasheet

AD7837/AD7847
REV. C
–12–
C01007a–0–8/00 (rev. C)
PRINTED IN U.S.A.
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
AD7837–6502/6809 Interface
Figure 25 shows an interface between the AD7837 and the 6502
or 6809 microprocessor. For the 6502 microprocessor, the φ2
clock is used to generate the WR, while for the 6809 the E sig-
nal is used.
WR
R/W
ADDRESS
DECODE
CS
LDAC
DB7
DB0
D7
D0
6502/6809
AD7837*
ADDRESS BUS
DATA BUS
*ADDITIONAL PINS OMITTED FOR CLARITY
A0 A1
EN
A15
A0
2 OR E
Figure 25. AD7837 to 6502/6809 Interface
24-Lead SOIC (R-24)
0.013 (0.32)
0.009 (0.23)
6
0
0.03 (0.76)
0.02 (0.51)
0.042 (1.067)
0.018 (0.457)
SEATING
PLANE
0.01 (0.254)
0.006 (0.15)
0.019 (0.49)
0.014 (0.35)
0.096 (2.44)
0.089 (2.26)
0.05
(1.27)
24 13
12
1
0.414 (10.52)
0.398 (10.10)
0.299 (7.6)
0.291 (7.39)
PIN 1
0.608 (15.45)
0.596 (15.13)
1. LEAD NO. 1 IDENTIFIED BY A DOT.
2. SOIC LEADS WILL EITHER BE TIN PLATED OR SOLDER DIPPED
IN ACCORDANCE WITH MIL-M-38510 REQUIREMENTS.
24-Lead Cerdip (Q-24)
24
112
13
PIN 1
0.295
(7.493)
MAX
15°
0°
0.320 (8.128)
0.290 (7.366)
0.012 (0.305)
0.008 (0.203)
TYP
0.180
(4.572)
MAX
SEATING
PLANE
0.225 (5.715)
MAX
1.290 (32.77) MAX
0.021 (0.533)
0.015 (0.381)
TYP
0.070 (1.778)
0.020 (0.508)
0.110 (2.794)
0.090 (2.286)
TYP
0.125 (3.175)
MIN
0.065 (1.651)
0.055 (1.397)
1. LEAD NO. 1 IDENTIFIED BY A DOT OR NOTCH.
2. CERDIP LEADS WILL EITHER BE TIN PLATED OR SOLDER DIPPED.
IN ACCORDANCE WITH MIL-M-38510 REQUIREMENTS
24-Lead Plastic DIP (N-24)
24
112
13
PIN 1
1.228 (31.19)
1.226 (31.14)
0.261  0.001
(6.61  0.03)
0.130 (3.30)
0.128 (3.25)
SEATING
PLANE
0.02 (0.5)
0.016 (0.41)
0.07 (1.78)
0.05 (1.27)
0.11 (2.79)
0.09 (2.28)
0.011 (0.28)
0.009 (0.23)
0.32 (8.128)
0.30 (7.62)
15°
0°
1. LEAD NO. 1 IDENTIFIED BY A DOT OR NOTCH.
2. PLASTIC LEADS WILL EITHER BE SOLDER DIPPED OR TIN LEAD PLATED.
IN ACCORDANCE WITH MIL-M-38510 REQUIREMENTS.