Datasheet

AD7836
–12–
REV. A
C2163a–0–9/99
PRINTED IN U.S.A.
* ADDITIONAL PINS OMITTED FOR CLARITY
+5V
8/10-BIT
DAC
V
DD
V
DD
GND
–5V
LOGIC LEVEL
SHIFT
GND
SCLK
SDATA
CONTROLLER
DATA BUS
SCLK
DIN
FSIN/CS
ADDR BUS
0V to -5V
0V to 5V
8/10-BIT
DAC
SCLK
DIN
FSIN/CS
ADDR
DECODER
V
REF
(+)A
V
REF
(–) A
AD7836 *
V
OUT
A
AGND
V
OUT
DATA BUS
A0,A1,A2
Figure 22. Programmable Reference Generation for the AD7836
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
44-Lead MQFP (S-44)
0.548 (13.925)
0.546 (13.875)
0.033 (0.84)
0.029 (0.74)
0.016 (0.41)
0.012 (0.30)
TOP VIEW
(PINS DOWN)
1
33
34
44
11
12
23
22
0.398 (10.11)
0.390 (9.91)
0.083 (2.11)
0.077 (1.96)
0.040 (1.02)
0.032 (0.81)
0.040 (1.02)
0.032 (0.81)
SEATING
PLANE
0.096 (2.44)
MAX
0.037 (0.94)
0.025 (0.64)
8
0.8
these DACs can be operated with supplies of 0 V and a –5 V,
with the V
DD
pin connected to 0 V and the GND pin connected
to –5 V. Now these can be used to provide the negative refer-
ence voltages for the V
REF
(–) inputs on the AD7836. However,
the digital signals driving the DACs need to be level shifted
from the 0 V to +5 V range to the –5 V to 0 V range. Figure 22
shows a typical application circuit to provide programmable ref-
erence capabilities for the AD7836.