Datasheet

Parameter B Grade
1
Units Comments
STATIC PERFORMANCE
MAIN DAC
Resolution 10 Bits
Relative Accuracy ±4 LSB max
Gain Error ±3 % FSR max
Bias Offset Error
2
±60 mV max DAC Code = 0.5 Full Scale
Zero-Scale Error ±35 mV max DAC Code = 000H for Offset Binary
Monotonicity 9 Bits and 200H for Twos Complement
Minimum Load Resistance 2 k min Coding
SUB DAC
Resolution 8 Bits
Differential Nonlinearity ±0.125 LSB typ Refers to an LSB of the Main DAC
±0.5 LSB max
OUTPUT CHARACTERISTICS
Output Voltage Range
3
V
BIAS
± 15/16 × V
BIAS
V Twos Complement Coding
V
BIAS
/16 to 31/16 × V
BIAS
V Offset Binary Coding
Voltage Output Settling Time to 10 Bits 4 µs max Typically 1.5 µs
Slew Rate 2.5 V/µs typ
Digital-to-Analog Glitch Impulse 1 nV-s typ 1 LSB Change Around the Major Carry
Digital Feedthrough 0.5 nV-s typ
Digital Crosstalk 0.5 nV-s typ
Analog Crosstalk ±0.2 LSB typ
DC Output Impedance 2 typ
Power Supply Rejection Ratio 0.002 %/% typ V
DD
± 10%
DAC REFERENCE INPUTS
REF IN Range 1.0 to V
DD
/2 V min to V max
REF IN Input Leakage ±1 µA max Typically ±1 nA
DIGITAL INPUTS
Input High Voltage, V
IH
@ V
DD
= 5 V 2.4 V min
Input High Voltage, V
IH
@ V
DD
= 3.3 V 2.1 V min
Input Low Voltage, V
IL
@ V
DD
= 5 V 0.8 V max
Input Low Voltage, V
IL
@ V
DD
= 3.3 V 0.6 V max
Input Leakage Current ±10 µA max
Input Capacitance 8 pF max
Input Coding Twos Comp/Binary
REFERENCE OUTPUT
REF OUT Output Voltage 1.23 V nom
REF OUT Error ±8 % max
REF OUT Temperature Coefficient –100 ppm/°C typ
REF OUT Output Impedance 5 k nom
POWER REQUIREMENTS
V
DD
(AV
DD
and DV
DD
) 3/5.5 V min to V max
I
DD
(AI
DD
Plus DI
DD
) Excluding Load Currents
Normal Mode 18 mA max V
IH
= V
DD
, V
IL
= DGND
System Standby (SSTBY) Mode 250 µA max V
IH
= V
DD
, V
IL
= DGND
Power-Down (PD) Mode
@ +25°C1µA max V
IH
= V
DD
, V
IL
= DGND
T
MIN
–T
MAX
3 µA max
Power Dissipation Excluding Power Dissipated in Load
Normal Mode 99 mW max
System Standby (SSTBY) Mode 1.38 mW max
Power-Down (PD) Mode
@ +25°C 5.5 µW max
T
MIN
–T
MAX
16.5 µW max
NOTES
1
Temperature range is – 40°C to +85°C.
2
Can be minimized using the Sub DAC.
3
V
BIAS
is the center of the output voltage swing and can be V
DD
/2, Internal Reference or REFIN as determined by MX1 and MX0 in the channel control register.
Specifications subject to change without notice.
(AV
DD
and DV
DD
= 3.3 V 10% to 5 V 10%; AGND = DGND = 0 V;
Reference = Internal Reference; C
L
= 100 pF; R
L
= 2 k to GND. Sub DAC at Midscale. All specifications T
MIN
to T
MAX
unless otherwise noted.)
AD7808/AD7809–SPECIFICATIONS
AD7804/AD7805/AD7808/AD7809
REV. A
–3–