Datasheet

AD7796/AD7797
Rev. A | Page 4 of 24
Parameter AD7796B/AD7797B
1
Unit Test Conditions/Comments
INTERNAL/EXTERNAL CLOCK
Internal Clock
Frequency
2
64 ± 3% kHz min/max
Duty Cycle 50:50 % typ
External Clock
Frequency 64 kHz nom
A 128 kHz clock can be used if the divide by 2
function is used (Bit CLK1 = CLK0 = 1)
Duty Cycle 45:55 to 55:45 % typ
Applies for external 64 kHz clock (a 128 kHz
clock can have a less stringent duty cycle)
LOGIC INPUTS
CS
2
Input Low Voltage, V
INL
0.8 V max DV
DD
= 5 V
0.4 V max DV
DD
= 3 V
Input High Voltage, V
INH
2.0 V min DV
DD
= 3 V or 5 V
SCLK, CLK, and
DIN (Schmitt-Triggered Input)
2
V
T
(+) 1.4/2 V min/V max DV
DD
= 5 V
V
T
(–) 0.8/1.7 V min/V max DV
DD
= 5 V
V
T
(+) − V
T
(–) 0.1/0.17 V min/V max DV
DD
= 5 V
V
T
(+) 0.9/2 V min/V max DV
DD
= 3 V
V
T
(–) 0.4/1.35 V min/V max DV
DD
= 3 V
V
T
(+) − V
T
(–)
0.06/0.13 V min/V max DV
DD
= 3 V
Input Currents ±10 μA max V
IN
= DV
DD
or GND
Input Capacitance 10 pF typ All digital inputs
LOGIC OUTPUTS (INCLUDING CLK)
Output High Voltage, V
OH
2
DV
DD
− 0.6 V min DV
DD
= 3 V, I
SOURCE
= 100 μA
4 V min DV
DD
= 5 V, I
SOURCE
= 200 μA
Output Low Voltage, V
OL
2
0.4 V max DV
DD
= 3 V, I
SINK
= 100 μA
0.4 V max
DV
DD
= 5 V, I
SINK
= 1.6 mA (DOUT/RDY)/800 μA (CLK)
Floating-State Leakage Current ±10 μA max
Floating-State Output Capacitance 10 pF typ
Data Output Coding Offset Binary
SYSTEM CALIBRATION
2
Full-Scale Calibration Limit +1.05 × FS V max
Zero-Scale Calibration Limit −1.05 × FS V min
Input Span 0.8 × FS V min
2.1 × FS V max
POWER REQUIREMENTS
7
Power Supply Voltage
AV
DD
– GND 2.7/5.25 V min/max
DV
DD
– GND 2.7/5.25 V min/max
Power Supply Currents
I
DD
Current 325 μA max 250 μA typ @ AV
DD
= 3 V, 280 μA typ @ AV
DD
= 5 V
I
DD
(Power-Down Mode) 1 μA max
1
Temperature range is –40°C to +85°C.
2
Specification is not production tested, but is supported by characterization data at initial product release.
3
Following a calibration, this error is in the order of the noise for the update rate selected.
4
Recalibration at any temperature removes these errors.
5
Full-scale error applies to both positive and negative full-scale and applies at the factory calibration conditions (AV
DD
= 4 V, T
A
= 25°C).
6
FS[3:0] are the four bits used in the mode register to select the output word rate.
7
Digital inputs equal to DV
DD
or GND.