Datasheet

AD7794/AD7795

Rev. D | Page 18 of 36

STATUS REGISTER

RS2, RS1, RS0 = 0, 0, 0; Power-On/Reset = 0x80

(AD7795)/0x88 (AD7794)

The status register is an 8-bit read-only register. To access the

ADC status register, the user must write to the communications

Bit RS1, and Bit RS0 with 0.

Table 16 outlines the bit designations for the status register. SR0

through SR7 indicate the bit locations, with SR denoting that

the bits are in the status register. SR7 denotes the first bit of the

data stream. The number in brackets indicates the power-

on/reset default status of that bit.

SR7 SR6 SR5 SR4 SR3 SR2 SR1 SR0

RDY(1)

ERR(0) NOXREF(0) 0(0) 0/1 CH2(0) CH1(0) CH0(0)

Table 16. Status Register Bit Designations

Bit No. Mnemonic Description

SR7

RDY Ready Bit for ADC. Cleared when data is written to the ADC data register. The RDY bit is set automatically after the

ADC data register has been read or a period of time before the data register is updated with a new conversion

result to indicate to the user not to read the conversion data. It is also set when the part is placed in power-down

mode. The end of a conversion is also indicated by the DOUT/

RDY pin. This pin can be used as an alternative to the

status register for monitoring the ADC for conversion data.

SR6 ERR

ADC Error Bit. This bit is written to at the same time as the

RDY bit. Set to indicate that the result written to the

ADC data register has been clamped to all 0s or all 1s. Error sources include overrange, underrange, or the absence

of a reference voltage. Cleared by a write operation to start a conversion.

SR5 NOXREF

No External Reference Bit. Set to indicate that the selected reference (REFIN1 or REFIN2) is at a voltage that is

below a specified threshold. When set, conversion results are clamped to all 1s. Cleared to indicate that a valid

reference is applied to the selected reference pins. The NOXREF bit is enabled by setting the REF_DET bit in the

configuration register to 1. The ERR bit is also set if the voltage applied to the selected reference input is invalid.

SR4 0 This bit is automatically cleared.

SR3 0/1 This bit is automatically cleared on the AD7795 and is automatically set on the AD7794.

SR2 to

SR0

CH2 to CH0 These bits indicate which channel is being converted by the ADC.