Datasheet

AD7792/AD7793
Rev. B | Page 4 of 32
Parameter AD7792B/AD7793B
1
Unit Test Conditions/Comments
REFERENCE
Internal Reference
Internal Reference Initial Accuracy 1.17 ± 0.01% V min/max AV
DD
= 4 V, T
A
= 25°C
Internal Reference Drift
2
4 ppm/°C typ
15 ppm/°C max
Power Supply Rejection 85 dB typ
External Reference
External REFIN Voltage 2.5 V nom
REFIN = REFIN(+) − REFIN(−)
Reference Voltage Range
2
0.1 V min
AV
DD
V max
When V
REF
= AV
DD
, the differential input must be
limited to 0.9 × V
REF
/gain if the in-amp is active
Absolute REFIN Voltage Limits
2
GND − 30 mV
V min
AV
DD
+ 30 mV V max
Average Reference Input Current 400 nA/V typ
Average Reference Input Current
Drift
±0.03 nA/V/°C typ
Normal Mode Rejection Same as for analog inputs
Common-Mode Rejection 100 dB typ
EXCITATION CURRENT SOURCES
(IEXC1 and IEXC2)
Output Current 10/210/1000 μA nom
Initial Tolerance at 25°C ±5 % typ
Drift 200 ppm/°C typ
Current Matching ±0.5 % typ Matching between IEXC1 and IEXC2; V
OUT
= 0 V
Drift Matching 50 ppm/°C typ
Line Regulation (V
DD
) 2 %/V typ AV
DD
= 5 V ± 5%
Load Regulation 0.2 %/V typ
Output Compliance
AV
DD
− 0.65
V max 10 μA or 210 μA currents selected
AV
DD
− 1.1
V max 1 mA currents selected
GND − 30 mV
V min
TEMPERATURE SENSOR
Accuracy
Sensitivity
±2
0.81
°C typ
mV/°C typ
Applies if user calibrates the temperature
sensor
BIAS VOLTAGE GENERATOR
V
BIAS
AV
DD
/2 V nom
V
BIAS
Generator Start-Up Time See Figure 10 ms/nF typ Dependent on the capacitance on the AIN pin
INTERNAL/EXTERNAL CLOCK
Internal Clock
Frequency
2
64 ± 3% kHz min/max
Duty Cycle 50:50 % typ
External Clock
Frequency 64 kHz nom
A 128 kHz external clock can be used if the
divide-by-2 function is used
(Bit CLK1 = CLK0 = 1)
Duty Cycle 45:55 to 55:45 % typ
Applies for external 64 kHz clock; a 128 kHz
clock can have a less stringent duty cycle
LOGIC INPUTS
CS
2
V
INL
, Input Low Voltage 0.8 V max DV
DD
= 5 V
V
INH
, Input High Voltage
0.4
2.0
V max
V min
DV
DD
= 3 V
DV
DD
= 3 V or 5 V