Datasheet

AD7781
Rev. 0 | Page 4 of 16
Parameter Min Typ Max Unit Test Conditions/Comments
INTERNAL CLOCK
Frequency 64 − 3% 64 + 3% kHz
Duty Cycle 50:50 %
LOGIC INPUTS
SCLK, FILTER, GAIN, PDRST
2
Input Low Voltage, V
INL
0.4 V DV
DD
= 3 V
0.8 V DV
DD
= 5 V
Input High Voltage, V
INH
1.8 V DV
DD
= 3 V
2.4 V DV
DD
= 5 V
SCLK (Schmitt-Triggered Input)
Hysteresis
2
100 mV DV
DD
= 3 V
140 mV DV
DD
= 5 V
Input Currents ±2 µA V
IN
= DV
DD
or GND
Input Capacitance 10 pF All digital inputs
LOGIC OUTPUT (DOUT/RDY)
Output High Voltage, V
OH
2
DV
DD
− 0.6 V DV
DD
= 3 V, I
SOURCE
= 100 µA
4 V DV
DD
= 5 V, I
SOURCE
= 200 µA
Output Low Voltage, V
OL
2
0.4 V DV
DD
= 3 V, I
SINK
= 100 µA
0.4 V DV
DD
= 5 V, I
SINK
= 1.6 mA
Floating-State Leakage Current ±2 µA
Floating-State Output Capacitance 10 pF
Data Output Coding Offset binary
POWER REQUIREMENTS
3
Power Supply Voltage
AV
DD
to GND 2.7 5.25 V
DV
DD
to GND 2.7 5.25 V
Power Supply Currents
I
DD
Current
Gain = 1 115 µA AV
DD
= 3 V
130 160 µA AV
DD
= 5 V
Gain = 128 (B Grade) 300 µA AV
DD
= 3 V
350 400 µA AV
DD
= 5 V
Gain = 128 (C Grade) 330 µA AV
DD
= 3 V
420 500 µA AV
DD
= 5 V
I
DD
(Power-Down/Reset Mode) 10 µA
1
Temperature range is −40°C to +105°C.
2
This specification is not production tested but is supported by characterization data at initial product release.
3
Digital inputs are equal to DV
DD
or GND.