Datasheet

AD7764
Rev. A | Page 28 of 32
USING THE AD7764
Step1 through Step 5 detail the sequence for powering up and
using the AD7764.
1. Apply power to the device.
2. Apply the MCLK signal.
3. Take
RESET
low for a minimum of one MCLK cycle,
preferably synchronous to the falling MCLK edge. If
multiple parts are to be synchronized, apply a common
4. Wait a minimum of two MCLK cycles after
RESET
to all devices.
RESET
5. If multiple parts are being synchronized, a
is
released.
SYNC
pulse
must be applied to the parts, preferably synchronous with
the MCLK rising edge. In the case where devices are not
being synchronized, no
SYNC
pulse is required; a logic
high signal should simply be applied to the
SYNC
When applying the
pin.
SYNC
• The issue of a
pulse,
SYNC
• Ensure that the
pulse to the device must not
coincide with a write to the device.
SYNC
Data can then be read from the device using the default gain
and overrange threshold values. The conversion data read is not
valid, however, until the settling time of the filter has elapsed.
Once this has occurred, the FILTER-SETTLE status bit is set,
indicating that the data is valid.
Values for gain and overrange thresholds can be written to or
read from the respective registers at this stage.
pulse is taken low for a
minimum of four MCLK periods.
BIAS RESISTOR SELECTION
The AD7764 requires a resistor to be connected between the
R
BIA S
and AGNDx pins. The resistor value should be selected to
give a current of 25 µA through the resistor to ground. For a
4.096 V reference voltage, the correct resistor value is 160 kΩ.