Datasheet

AD7763 Data Sheet
Rev. B | Page 8 of 32
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
05476-005
64
DGND
63
V
DRIVE
62
DGND
61
I
2
S
60
SCR
59
DGND
58
CDIV
57
DGND
56
FSO
55
SCO
54
SDO
53
DGND
52
SDI
51
FSI
50
SDL
49
SCP
47
ADR1
46
ADR2
45
SH0
42
DGND
43
DGND
44
V
DRIVE
48
ADR0
41
DV
DD
40
SH1
39
SH2
37
RESET
36
SYNC
35
DGND
34
AGND1
33
AV
DD1
38
DRDY
2
MCLKGND
3
MCLK
4
AV
DD2
7
AGND1
6
AV
DD1
5
AGND2
1
DGND
8
DECAPA
9
REFGND
10
V
REF+
12
AV
DD4
13
AGND2
14
AV
DD2
15
AV
DD2
16
AGND2
11
AGND4
PIN 1
17
R
BIAS
18
AGND2
19
V
IN
A+
20
V
IN
A–
21
V
OUT
A–
22
V
OUT
A+
23
AGND3
24
AV
DD3
25
V
IN
+
26
V
IN
27
AV
DD2
28
AGND2
29
AGND3
30
DECAPB
31
AGND3
32
AGND3
AD7763
TOP VIEW
(Not to Scale)
NOTES
1. CONNECT THE EXPOSED PAD TO AGNDx WITH SIX TO EIGHT VIAS.
Figure 5. Pin Configuration
Table 5. Pin Function Descriptions
Pin No. Mnemonic Description
6, 33 AV
DD1
Power Supply for Modulator, 2.5 V. These pins should be decoupled to AGND1 with 100 nF and
10 µF capacitors on each pin.
4, 14, 15, 27 AV
DD2
Power Supply, 5 V. These pins should be decoupled to AGND2 with 100 nF capacitors on each of
Pin 4, Pin 14, and Pin 15. Pin 27 should be connected to Pin 14 via an 8.2 nH inductor.
24
AV
DD3
Power Supply for Differential Amplifier, 3.3 V to 5 V. This pin should be decoupled to AGND3
with a 100 nF capacitor.
12 AV
DD4
Power Supply for Reference Buffer, 3.3 V to 5 V. This pin should be decoupled to AGND4
with a 10 nF capacitor in series with a 10 resistor.
7, 34 AGND1 Power Supply Ground for Analog Circuitry Powered by AV
DD1
.
5, 13, 16, 18, 28 AGND2 Power Supply Ground for Analog Circuitry Powered by AV
DD2
.
23, 29, 31, 32 AGND3 Power Supply Ground for Analog Circuitry Powered by AV
DD3
.
11 AGND4 Power Supply Ground for Analog Circuitry Powered by AV
DD4
.
9 REFGND Reference Ground. Ground connection for the reference voltage.
41 DV
DD
Power Supply for Digital Circuitry and FIR Filter, 2.5 V. This pin should be decoupled to DGND
with a 100 nF capacitor.
44, 63 V
DRIVE
Logic Power Supply Input, 1.8 V to 2.5 V. The voltage supplied at these pins determines
the operating voltage of the logic interface. These pins must be connected together and
tied to the same supply. Each pin should also be decoupled to DGND with a 100 nF capacitor.
1, 35, 42, 43, 53, 57, 59,
62, 64
DGND
Ground Reference for Digital Circuitry.
19 V
IN
A+ Positive Input to Differential Amplifier.
20 V
IN
A− Negative Input to Differential Amplifier.
21 V
OUT
A− Negative Output from Differential Amplifier.
22 V
OUT
A+ Positive Output from Differential Amplifier.
25 V
IN
+ Positive Input to the Modulator.
26 V
IN
Negative Input to the Modulator.
10 V
REF+
Reference Input. The input range of this pin is determined by the reference buffer
supply voltage (AV
DD4
). See the Reference Voltage Filtering section for more details.