Datasheet

AD7747
Rev. 0 | Page 9 of 28
150
–150
01k
05469-010
PARALLEL RESISTANCE (MΩ)
CAP ERROR (fF)
10 100
100
50
0
–50
–100
Figure 10. Capacitance Input Error vs. Parallel Resistance;
CIN(+) to GND = 8 pF, V
DD
= 5 V
0
–1000
0 200
05469-058
CIN TO SHLD RESISTANCE (kΩ)
CAP ERROR (fF)
–100
–200
–300
–400
–500
–600
–700
–800
–900
25 50 75 100 125 150 175
Figure 11. Capacitance Input Error vs. Resistance Between CIN1(+) and SHLD;
CIN(+) to GND = 8 pF, V
DD
= 5 V
100
–1000
0.091
05469-059
CIN TO SHLD RESISTANCE (MΩ)
CAP ERROR (fF)
–100
0
–200
–300
–400
–500
–600
–700
–800
–900
0.27 0.48 0.96 5 25 100
Figure 12. Capacitance Input Error vs. Resistance Between CIN(+) and SHLD;
CIN(+) to GND = 25 pF, V
DD
= 5 V
1.0
–1.0
0.01
100
05469-066
SHLD TO GND RESISTANCE (MΩ)
CAP ERROR (pF)
0.1 1.0 10.0
0.8
0.6
0.4
0.2
0
–0.2
–0.4
–0.6
–0.8
Figure 13. Capacitance Input Error vs. Resistance Between SHLD and GND;
CIN(+) to GND = 8 pF; V
DD
= 5 V
10
–100
1
100
05469-067
SERIAL RESISTANCE (kΩ)
CAP ERROR (fF)
10
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
25 pF
8 pF
Figure 14. Capacitance Input Error vs. Serial Resistance;
CIN(+) to GND = 8 pF and 25pF, V
DD
= 5 V
0.2
–0.6
2.5 5.5
05469-062
VDD (V)
CAP ERROR (fF)
0
–0.2
–0.4
3.0 3.5 4.0 4.5 5.0
Figure 15. Capacitance Input Power Supply Rejection (PSR);
CIN(+) to GND = 8 pF