Datasheet

AD7747
Rev. 0 | Page 19 of 28
CAP DAC A REGISTER
Address Pointer 0x0B, Default Value 0x00
Capacitive DAC setup.
Table 19. Cap DAC A Register Bit Map
Bit Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Mnemonic DACAENA – DACA—6-Bit Value
Default 0 0 0x00
Table 20.
Bit Mnemonic Description
7 DACAENA DACAENA = 1 connects capacitive DACA to the positive capacitance input.
6 – This bit must be 0 for proper operation.
5 to 1 DACA
DACA value, Code 0x00 ≈ 0 pF, Code 0x3F ≈ full range.
CAP DAC B REGISTER
Address Pointer 0x0C, Default Value 0x00
Capacitive DAC setup.
Table 21. Cap DAC B Register Bit Map
Bit Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Mnemonic DACBENB – DACB—6-Bit Value
Default 0 0 0x00
Table 22.
Bit Mnemonic Description
7 DACBENB DACBENB = 1 connects capacitive DACB to the negative capacitance input.
6 – This bit must be 0 for proper operation.
5 to 1 DACB
DACB value, Code 0x00 ≈ 0 pF, Code 0x3F ≈ full range.