Datasheet

AD7745/AD7746
Rev. 0 | Page 8 of 28
TYPICAL PERFORMANCE CHARACTERISTICS
100
0
–5 5
05468-014
INPUT CAPACITANCE (pF)
INL (ppm)
80
60
40
20
–4 –3 –2 –1 0 1 2 3 4
Figure 6. Capacitance Input Integral Nonlinearity,
V
DD
= 5 V, the Same Configuration as in Figure 31
2000
–3000
–50 150
05468-015
TEMPERATURE (°C)
GAIN ERROR (ppm)
1000
0
–1000
–2000
–25 0 25 50 75 100 125
GAIN TC ≈ –26ppm/°C
Figure 7. Capacitance Input Offset Drift vs. Temperature,
V
DD
= 5 V, CIN and EXC Pins Open Circuit
100
–100
–50 150
05468-016
TEMPERATURE (°C)
OFFSET ERROR (aF)
75
50
25
0
–25
–50
–75
–25 0 25 50 75 100 125
Figure 8. Capacitance Input Gain Drift vs. Temperature,
V
DD
= 5 V, CIN(+) to EXC = 4 pF, the Same Configuration as in Figure 30
18
–2
0 500
05468-017
CAPACITANCE CIN PIN TO GND (pF)
CAPACITANCE ERROR (fF)
16
14
12
10
8
6
4
2
0
50 100 150 200 250 300 350 400 450
2.7V 3V 5V3.3V
Figure 9. Capacitance Input Error vs. Capacitance between CIN and GND.
CIN(+) to EXC = 4 pF, CIN(−) to EXC = 0 pF, V
DD
= 2.7 V, 3 V, 3.3 V, and 5 V,
the Same Configuration as in Figure 33
18
–2
0 500
05468-018
CAPACITANCE CIN PIN TO GND (pF)
CAPACITANCE ERROR (fF)
16
14
12
10
8
6
4
2
0
50 100 150 200 250 300 350 400 450
2.7V 3V 3.3V
5V
Figure 10. Capacitance Input Error vs. Capacitance between CIN and GND,
CIN(+) to EXC = 21 pF, CIN(−) to EXC = 23 pF, V
DD
= 2.7 V, 3 V, 3.3 V, and 5 V,
the Same Configuration as in Figure 34
5
–1
0 500
05468-019
CAPACITANCE EXC PIN TO GND (pF)
CAPACITANCE ERROR (fF)
4
3
2
1
0
50 100 150 200 250 300 350 400 450
2.7V
3V
5V
3.3V
Figure 11. Capacitance Input Error vs. Capacitance between EXC and GND,
CIN(+) to EXC = 21 pF, CIN(−) to EXC = 23 pF, V
DD
= 2.7 V, 3 V, 3.3 V, and 5 V,
the Same Configuration as in Figure 34