Datasheet

AD7745/AD7746
Rev. 0 | Page 22 of 28
0x000000 ... 0xFFFFFF
DATA
CAPDIFF = 1
± 4pF
CDC
EXC
CIN(+)
CIN(–)
C
X
15 ... 19pF
(17 ± 2pF)
C
Y
15 ... 19pF
(17 ± 2pF)
CAPDAC(+)
17pF
CAPDAC(–)
17pF
05468-021
Figure 34. Using CAPDAC in Differential Mode
0x000000 ... 0xFFFFFF
DATA
CAPDIFF = 1
± 4pF
CDC
EXC
CIN(+)
CIN(–)
C
X
13 ... 21pF
(17 ± 4pF)
C
Y
17pF
CAPDAC(+)
17pF
CAPDAC(–)
17pF
05468-011
Figure 35. Using CAPDAC in Differential Mode
PARASITIC CAPACITANCE TO GROUND
DATA
CDC
EXC
C
GND1
CIN
C
GND2
C
X
05468-012
Figure 36. Parasitic Capacitance to Ground
The CDC architecture used in the AD7745/AD7746 measures
the capacitance C
X
connected between the EXC pin and the
CIN pin. In theory, any capacitance C
P
to ground should not
affect the CDC result (see Figure 36).
The practical implementation of the circuitry in the chip
implies certain limits and the result is gradually affected by
capacitance to ground. See the allowed capacitance to GND in
the specification table for CIN and excitation. Also see the
typical performance characteristics shown in Figure 9, Figure
10, and Figure 11
.
PARASITIC RESISTANCE TO GROUND
DATA
CDC
EXC
R
GND1
CIN
R
GND2
C
X
05468-013
Figure 37. Parasitic Resistance to Ground
The AD7745/AD7746 CDC result would be affected by a leak-
age current from the C
X
to ground, therefore the C
X
should be
isolated from the ground. The influence of the leakage current
varies with the power supply voltage. The following limits can
be used as a guideline for the allowed leakage current or the
equivalent resistance between the C
X
and ground (Figure 37).
V
DD
≈ 5 V: I
GND
< 150 nA (that is, R
GND
> 30 MΩ)
V
DD
≥ 3 V: I
GND
< 60 nA (that is, R
GND
> 50 MΩ)
V
DD
≥ 2.7 V: I
GND
< 30 nA (that is, R
GND
> 100 MΩ)
A higher leakage current to ground results in a gain error, an
offset error, and a nonlinearity error. See the typical
performance characteristics shown in Figure 12 and Figure 13.
PARASITIC PARALLEL RESISTANCE
DATA
CDC
EXC
CIN
R
P
05468-022
C
X
Figure 38. Parasitic Parallel Resistance
The AD7745/AD7746 CDC measures the charge transfer
between EXC pin and CIN pin. Any resistance connected in
parallel to the measured capacitance CX (see Figure 38), such as
the parasitic resistance of the sensor, also transfers charge.
Therefore, the parallel resistor is seen as an additional
capacitance in the output data. The equivalent parallel
capacitance (or error caused by the parallel resistance) can be
approximately calculated as
4
1
××
=
EXC
P
P
FR
C
Where R
P
is the parallel resistance and C
EXC
is the excitation
frequency. See the typical performance characteristics shown in
Figure 14.