Datasheet

AD7745/AD7746
Rev. 0| Page 13 of 28
If a repeated start condition is encountered after the address
pointer byte, all peripherals connected to the bus respond
exactly as outlined above for a start condition, that is, a repeated
start condition is treated the same as a start condition. When a
master device issues a stop condition, it relinquishes control of
the bus, allowing another master device to take control of the
bus. Hence, a master wanting to retain control of the bus issues
successive start conditions known as repeated start conditions.
AD7745/AD7746 RESET
To reset the AD7745/AD7746 without having to reset the entire
I
2
C bus, an explicit reset command is provided. This uses a
particular address pointer word as a command word to reset the
part and upload all default settings. The AD7745/AD7746 do
not respond to the I
2
C bus commands (do not acknowledge)
during the default values upload for approximately 150 µs
(max 200 µs).
The reset command address word is 0xBF.
GENERAL CALL
When a master issues a slave address consisting of seven 0s with
the eighth bit (R/W bit) set to 0, this is known as the general call
address. The general call address is for addressing every device
connected to the I
2
C bus. The AD7745/AD7746 acknowledge
this address and read in the following data byte.
If the second byte is 0x06, the AD7745/AD7746 are reset,
completely uploading all default values. The AD7745/AD7746
do not respond to the I
2
C bus commands (do not acknowledge)
during the default values upload for approximately 150 µs (max
200 µs).
The AD7745/AD7746 do not acknowledge any other general
call commands.
1–7 8 9 1 –7 8 9 1–7 8 9 PS
START ADDR
R/W
ACK SUBADDRESS ACK DATA ACK STOP
SDATA
SCLOCK
05468-006
Figure 24. Bus Data Transfer
DATA A(S)S SLAVE ADDR A(S) SUB ADDR A(S)
LSB = 0
LSB = 1
DATA P
S SLAVE ADDR A(S) SUB ADDR A(S) S SLAVE ADDR A(S) DATA
A(M)
DATA P
WRITE
SEQUENCE
READ
SEQUENCE
A(S) = NO-ACKNOWLEDGE BY SLAVE
A(M) = NO-ACKNOWLEDGE BY MASTER
A(S) = ACKNOWLEDGE BY SLAVE
A(M) = ACKNOWLEDGE BY MASTER
S = START BIT
P = STOP BIT
A(S)
A(M)
05468-007
Figure 25. Write and Read Sequences