Datasheet

REV. 0 –3–
AD7741/AD7742
(V
DD
= +4.75 V to +5.25 V; V
REF
= +2.5 V; f
CLKIN
= 6.144 MHz; all specifications T
MIN
to
T
MAX
unless otherwise noted.)
B Version
1
Y Version
2
Parameter
3
Min Typ Max Min Typ Max Units Conditions/Comments
DC PERFORMANCE
Integral Nonlinearity
f
CLKIN
= 200 kHz
4
±0.0122 ±0.015 % of Span
5
f
CLKIN
= 3 MHz
4
±0.0122 ±0.015 % of Span
f
CLKIN
= 6.144 MHz ±0.0122 ±0.015 % of Span
Offset Error ±40 ±40 mV Unipolar Mode
±40 ±40 mV Bipolar Mode
Gain Error +0.2 +1.2 +2.2 +0.2 +1.2 +2.2 % of Span Unipolar Mode
+0.2 +1.2 +2.2 +0.2 +1.2 +2.2 % of Span Bipolar Mode
Offset Error Drift
4
±12 ±12 µV/°C Unipolar Mode
±12 ±12 µV/°C Bipolar Mode
Gain Error Drift
4
±2 ±2 ppm of Span/°C Unipolar Mode
±4 ±4 ppm of Span/°C Bipolar Mode
Power Supply Rejection Ratio
4
–70 –70 dB ∆V
DD
= ±5%
Channel-to-Channel Isolation
4
–75 –75 dB
Common-Mode Rejection –60 –78 –58 –78 dB
ANALOG INPUTS (V
IN
1–V
IN
4)
6
Input Current ±50 ±100 ±50 ±100 nA
Common-Mode Input Range +0.5 V
DD
– 1.75 +0.5 V
DD
– 1.75 V
Differential Input Range –V
REF
/Gain +V
REF
/Gain –V
REF
/Gain +V
REF
/Gain V Bipolar Mode
0+V
REF
/Gain 0 +V
REF
/Gain V Unipolar Mode
VOLTAGE REFERENCE
REFIN
Nominal Input Voltage 2.5 2.5 V
Input Impedance
4
f
CLKIN
= 3 MHz 70 70 kΩ
f
CLKIN
= 6.144 MHz 35 35 kΩ
REFOUT
Output Voltage 2.38 2.50 2.60 2.38 2.50 2.60 V
Output Impedance
4
11kΩ
Reference Drift
4
±50 ±50 ppm/°C
Line Rejection –70 –70 dB
Reference Noise
(0.1 Hz to 10 Hz)
4
100 100 µV p-p
LOGIC OUTPUT
Output High Voltage, V
OH
4.0 4.0 V Output Sourcing 800 µA
7
Output Low Voltage, V
OL
0.4 0.4 V Output Sinking 1.6 mA
7
Minimum Output Frequency 0.05 f
CLKIN
0.05 f
CLKIN
Hz V
IN
= 0 V (Unipolar), V
IN
=
–V
REF
/Gain (Bipolar)
Maximum Output Frequency 0.45 f
CLKIN
0.45 f
CLKIN
Hz V
IN
= V
REF
/Gain (Unipolar
and Bipolar)
LOGIC INPUT
ALL EXCEPT CLKIN
Input High Voltage, V
IH
2.4 2.4 V
Input Low Voltage, V
IL
0.8 0.8 V
Input Current ±100 ±100 nA
Pin Capacitance 6 10 6 10 pF
CLKIN ONLY
Input High Voltage, V
IH
3.5 3.5 V
Input Low Voltage, V
IL
0.8 0.8 V
Input Current ±2 ±2 µA
Pin Capacitance 6 10 6 10 pF
CLOCK FREQUENCY
Input Frequency 6.144 6.144 MHz For Specified Performance
POWER REQUIREMENTS
V
DD
4.75 5.25 4.75 5.25 V
I
DD
(Normal Mode) 6 8 6 8 mA Output Unloaded
I
DD
(Power-Down) 25 35 25 35 µA
Power-Up Time
4
30 30 µs Coming Out of Power-
Down Mode
N OTES
1
Temperature range: B Version: –40°C to +85°C.
2
Temperature range: Y Version: –40°C to +105°C.
3
See Terminology.
4
Guaranteed by design and characterization, not production tested.
5
Span = Maximum Output Frequency–Minimum Output Frequency.
6
The absolute voltage on the input pins must not go more positive than V
DD
– 1.75 V or more negative than +0.5 V.
7
These logic levels apply to CLKOUT only when it is loaded with one CMOS load.
Specifications subject to change without notice
.
AD7742–SPECIFICATIONS