Datasheet

REV. 0
AD7738
–5–
DOUT MSB
t
5
t
9
LSB
t
5A
CS
t
7
t
8
t
6
t
4
SCLK
Figure 1. Read Cycle Timing Diagram
DIN
MSB
t
12
LSB
t
13
SCLK
CS
t
15
t
16
t
14
t
11
Figure 2. Write Cycle Timing Diagram
TO
OUTPUT
PIN
50pF
I
SINK
(800A AT DV
DD
= 5V
100A AT DV
DD
= 3V)
1.6V
I
SOURCE
( 200A AT DV
DD
= 5V
100A AT DV
DD
= 3V)
Figure 3. Load Circuit for Access Time and Bus Relinquish Time