Datasheet

AD7732
Rev. A | Page 4 of 32
Parameter Min Typ Max Unit Test Conditions/Comments
RA, RB, RC, RD Pin Impedance
1, 9
25 31
kΩ
Input Resistor Matching 0.2 %
Input Resistor Temp. Coefficient –30 ppm/°C
REFERENCE INPUTS
REFIN(+) to REFIN(–) Voltage
1, 10
2.475 2.5 2.525 V
NOREF Trigger Voltage 0.5 V NOREF Bit in Channel Status Register
REFIN(+), REFIN(–)
Common-Mode Voltage
1
0 AV
DD
V
Reference Input DC Current
11
400 μA
SYSTEM CALIBRATION
1, 12
Full-Scale Calibration Limit
+1.05 × FS
V
Zero-Scale Calibration Limit
–1.05 × FS
V
Input Span
0.8 × FS 2.1 × FS
V
LOGIC INPUTS
Input Current
±1
μA
Input Current CS
±10
μA
CS = DV
DD
–40 μA
CS
= DGND, Internal Pull-Up Resistor
Input Capacitance 5 pF
V
T+
1
1.4 2 V DV
DD
= 5 V
V
T–
1
0.8 1.4 V DV
DD
= 5 V
V
T+
– V
T–
1
0.3 0.85 V DV
DD
= 5 V
V
T+
1
0.95 2 V DV
DD
= 3 V
V
T–
1
0.4 1.1 V DV
DD
= 3 V
V
T+
– V
T–
1
0.3 0.85 V DV
DD
= 3 V
MCLK IN ONLY
Input Current
±10
μA
Input Capacitance 5 pF
V
INL
Input Low Voltage 0.8 V DV
DD
= 5 V
V
INH
Input High Voltage 3.5 V DV
DD
= 5 V
V
INL
Input Low Voltage 0.4 V DV
DD
= 3 V
V
INH
Input High Voltage 2.5 V DV
DD
= 3 V
LOGIC OUTPUTS
13
V
OL
Output Low Voltage 0.4 V I
SINK
= 800 μA, DV
DD
= 5 V
V
OH
Output High Voltage 4.0 V I
SOURCE
= 200 μA, DV
DD
= 5 V
V
OL
Output Low Voltage 0.4 V I
SINK
= 100 μA, DV
DD
= 3 V
V
OH
Output High Voltage DV
DD
– 0.6 V I
SOURCE
= 100 μA, DV
DD
= 3 V
Floating State Leakage Current
±1
μA
Floating State Leakage Capacitance 3 pF
P0, P1 INPUTS/OUTPUTS Levels Referenced to Analog Supplies
Input Current
±10
μA
V
INL
Input Low Voltage 0.8 V AV
DD
= 5 V
V
INH
Input High Voltage 3.5 V AV
DD
= 5 V
V
OL
Output Low Voltage 0.4 V I
SINK
= 7 mA, See Abs. Max. Ratings
V
OH
Output High Voltage 4.0 V I
SOURCE
= 200 μA, AV
DD
= 5 V
POWER REQUIREMENTS
AV
DD
–AGND Voltage 4.75 5.25 V
DV
DD
–DGND Voltage 4.75 5.25 V
2.70 3.60 V
AV
DD
Current (Normal Mode) 13.5 15.9 mA AV
DD
= 5 V
DV
DD
Current (Normal Mode)
14
2.8 3.1 mA DV
DD
= 5 V
DV
DD
Current (Normal Mode)
14
1.0 1.5 mA DV
DD
= 3 V