Datasheet

REV. B
AD7722
–5–
TIMING SPECIFICATIONS
Parameter Symbol Min Typ Max Unit
CLKIN Frequency f
CLK
0.3 12.5 15 MHz
CLKIN Period (t
CLK
= 1/f
CLK
)t
1
0.067 0.08 3.33 µs
CLKIN Low Pulse Width t
2
0.45 × t
1
0.55 × t
1
CLKIN High Pulse Width t
3
0.45 × t
1
0.55 × t
1
CLKIN Rise Time t
4
5ns
CLKIN Fall Time t
5
5ns
FSI Low Time t
6
2t
CLK
FSI Setup Time t
7
20 ns
FSI Hold Time t
8
20 ns
CLKIN to SCO Delay t
9
40 ns
SCO Period
1
t
10
2t
CLK
SCO Transition to FSO High Delay t
11
410 ns
SCO Transition to FSO Low Delay t
12
410 ns
SCO Transition to SDO Valid Delay t
13
38 ns
SCO Transition from FSI
2
t
14
2.5 t
CLK
SDO Enable Delay Time t
15
30 45 ns
SDO Disable Delay Time t
16
10 30 ns
DRDY High Time t
17
2t
CLK
Conversion Time
1
t
18
64 t
CLK
DRDY to CS Setup Time t
19
0ns
CS to RD Setup Time t
20
0ns
RD Pulse Width t
21
t
CLK
+ 20 ns
Data Access Time after RD Falling Edge
3
t
22
t
CLK
+ 40 ns
Bus Relinquish Time after RD Rising Edge t
23
t
CLK
+ 40 ns
CS to RD Hold Time t
24
0ns
RD to DRDY High Time t
25
1t
CLK
SYNC/RESET Input Pulse Width t
26
10 ns
DVAL Low Delay from SYNC/RESET t
27
40 ns
SYNC/RESET Low Time after CLKIN Rising t
28
10 t
CLK
– 10 ns
DRDY High Delay after SYNC/RESET Low t
29
50 ns
DRDY Low Delay after SYNC/RESET Low
1
t
30
(8192 + 64) t
CLK
DVAL High Delay after SYNC/RESET Low
1
t
31
8192 t
CLK
CAL Setup Time t
34
10 ns
CAL Pulse Width t
35
12 t
CLK
Calibration Delay from CAL High t
36
64 t
CLK
Unipolar Input Calibration Time, (UNI = 0)
1, 4
t
37
(3 × 8192 + 2 × 512) t
CLK
Bipolar Input Calibration Time, (UNI = 1)
1, 4
t
37
(4 × 8192 + 3 × 512) t
CLK
Conversion Results Valid, (UNI = 0)
1
t
38
(3 × 8192 + 2 × 512 + 64) t
CLK
Conversion Results Valid, (UNI = 1)
1
t
38
(4 × 8192 + 3 × 512 + 64) t
CLK
NOTES
1
Guaranteed by design.
2
Frame sync is initiated on falling edge of CLKIN.
3
With RD synchronous to CLKIN, t
22
can be reduced up to 1 t
CLK
.
4
See Figure 8.
Specifications subject to change without notice.
(AV
DD
= 5 V ⴞ 5%, DV
DD
= 5 V ⴞ 5%, AGND = DGND = 0 V, C
L
= 50 pF, T
A
= T
MIN
to T
MAX
,
f
CLKIN
= 12.5 MHz, SFMT = Logic Low or High, CFMT = Logic Low or High.)