Datasheet

Parameter A, S Versions
1
Unit Conditions/Comments
STATIC PERFORMANCE
No Missing Codes 24 Bits min Guaranteed by Design. For Filter Notches £ 60 Hz
22 Bits min For Filter Notch = 100 Hz
18 Bits min For Filter Notch = 250 Hz
15 Bits min For Filter Notch = 500 Hz
12 Bits min For Filter Notch = 1 kHz
Output Noise See Tables I and II Depends on Filter Cutoffs and Selected Gain
Integral Nonlinearity @ 25∞C ± 0.0015 % FSR max Filter Notches £ 60 Hz
T
MIN
to T
MAX
0.003 % FSR max Typically ± 0.0003%
Positive Full-Scale Error
2, 3, 4
Excluding Reference
Full-Scale Drift
5
1 mV/∞C typ Excluding Reference. For Gains of 1, 2
0.3 mV/∞C typ Excluding Reference. For Gains of 4, 8, 16, 32, 64, 128
Unipolar Offset Error
2, 4
Unipolar Offset Drift
5
0.5 mV/∞C typ For Gains of 1, 2
0.25 mV/∞C typ For Gains of 4, 8, 16, 32, 64, 128
Bipolar Zero Error
2, 4
Bipolar Zero Drift
5
0.5 mV/∞C typ For Gains of 1, 2
0.25 mV/∞C typ For Gains of 4, 8, 16, 32, 64, 128
Gain Drift 2 ppm/∞C typ
Bipolar Negative Full-Scale Error
2
@ 25∞C ± 0.003 % FSR max Excluding Reference
± 0.006 % FSR max Typically ± 0.0006%
Bipolar Negative Full-Scale Drift
5
1 mV/∞C typ Excluding Reference. For Gains of 1, 2
T
MIN
to T
MAX
0.3 mV/∞C typ Excluding Reference. For Gains of 4, 8, 16, 32, 64, 128
ANALOG INPUTS/REFERENCE INPUTS
Common-Mode Rejection (CMR) 100 dB min At dc and AV
DD
= 5 V
90 dB min At dc and AV
DD
= 10 V
Common-Mode Voltage Range
6
V
SS
to AV
DD
V min to V max
Normal-Mode 50 Hz Rejection
7
100 dB min For Filter Notches of 10, 25, 50 Hz, ± 0.02 ¥ f
NOTCH
Normal-Mode 60 Hz Rejection
7
100 dB min For Filter Notches of 10, 30, 60 Hz, ± 0.02 ¥ f
NOTCH
Common-Mode 50 Hz Rejection
7
150 dB min For Filter Notches of 10, 25, 50 Hz, ± 0.02 ¥ f
NOTCH
Common-Mode 60 Hz Rejection
7
150 dB min For Filter Notches of 10, 30, 60 Hz, ± 0.02 ¥ f
NOTCH
DC Input Leakage Current
7
@ 25∞C10 pA max
T
MIN
to T
MAX
1 nA max
Sampling Capacitance
7
20 pF max
Analog Inputs
8
Input Voltage Range
9
For Normal Operation. Depends on Gain Selected
0 to +V
REF
10
nom Unipolar Input Range (B/U Bit of Control Register = 1)
± V
REF
nom Bipolar Input Range (B/U Bit of Control Register = 0)
Input Sampling Rate, f
S
See Table III
Reference Inputs
REF IN(+) – REF IN(–) Voltage
11
2.5 to 5 V min to V max For Specified Performance. Part Functions with
Lower V
REF
Voltages
Input Sampling Rate, f
S
f
CLK IN
/256
REFERENCE OUTPUT
Output Voltage 2.5 V nom
Initial Tolerance @ 25∞C ± 1% max
Drift 20 ppm/∞C typ
Output Noise 30 mV typ pk-pk Noise 0.1 Hz to 10 Hz Bandwidth
Line Regulation (AV
DD
)1 mV/V max
Load Regulation 1.5 mV/mA max Maximum Load Current 1 mA
External Current 1 mA max
NOTES
1
Temperature ranges are as follows: A Version, –40∞C to +85∞C; S Version, –55∞C to +125∞C.
2
Applies after calibration at the temperature of interest.
3
Positive full-scale error applies to both unipolar and bipolar input ranges.
4
These errors will be of the order of the output noise of the part as shown in Table I when using system calibration. These errors are 20 mV typical when using self-
calibration or background calibration.
5
Recalibration at any temperature or use of the background calibration mode will remove these drift errors.
6
This common-mode voltage range is allowed, provided that the input voltage on AIN(+) and AIN(–) does not exceed AV
DD
+ 30 mV and V
SS
– 30 mV.
7
These numbers are guaranteed by design and/or characterization.
8
The analog inputs present a very high impedance dynamic load that varies with clock frequency and input sample rate. The maximum recommended source
resistance depends on the selected gain (see Tables IV and V).
9
The analog input voltage range on the AIN1(+) and AIN2(+) inputs is given here with respect to the voltage on the AIN1(–) and AIN2(–) inputs. The absolute
voltage on the analog inputs should not go more positive than AV
DD
+ 30 mV or go more negative than V
SS
– 30 mV.
10
V
REF
= REF IN(+) – REF IN(–).
11
The reference input voltage range may be restricted by the input voltage range requirement on the V
BIAS
input.
(AV
DD
= +5 V ⴞ 5%; DV
DD
= +5 V ⴞ 5%; V
SS
= 0 V or –5V ⴞ 5%; REF IN(+) = +2.5 V;
REF IN(–) = AGND; MCLK IN = 10 MHz, unless otherwise stated. All specifications T
MIN
to T
MAX
, unless otherwise noted.)
–2– REV. D
AD7711A–SPECIFICATIONS