Datasheet

AD7707
Rev. B | Page 42 of 52
Writetoreg (int byteword);
{
int q;
SPCR = 0x3f;
SPCR = 0X7f; /* this sets the WiredOR mode (DWOM=1), Master mode (MSTR=1), SCK idles high
(CPOL=1), /SS can be low always (CPHA=1), lowest clock speed (slowest speed which is master
clock /32) */
DDRD = 0x18; /* SCK, MOSI outputs */
q = SPSR;
q = SPDR; /* the read of the status register and of the data register is needed to clear the
interrupt which tells the user that the data
transfer is complete */
PORTC &= 0xfb; /* /CS is low */
SPDR = byteword; /* put the byte into data register */
while (! (SPSR & 0x80)); /* wait for /DRDY to go low */
PORTC |= 0x4; /* /CS high */
}
Read (int amount, int reglength)
{
int q;
SPCR = 0x3f;
SPCR = 0x7f; /* clear the interrupt */
DDRD = 0x10; /* MOSI output, MISO input, SCK output */
while (PORTC & 0x10); /* wait for /DRDY to go low */
PORTC & 0xfb ; /* /CS is low */
for (b=0;b<reglength;b++)
{
SPDR = 0;
while (! (SPSR & 0x80)); /* wait until port is ready before reading */
*datapointer++=SPDR; /* read SPDR into store array via datapointer */
}
PORTC|=4; /* /CS is high */
}