Datasheet

Data Sheet AD7687
Rev. B | Page 15 of 28
ANALOG INPUT
Figure 28 shows an equivalent circuit of the input structure of
the AD7687.
The two diodes, D1 and D2, provide ESD protection for the
analog inputs IN+ and IN−. Care must be taken to ensure that
the analog input signal never exceeds the supply rails by more
than 0.3 V because this causes these diodes to begin to forward-
bias and start conducting current. These diodes can handle a
forward-biased current of 130 mA maximum. For instance,
these conditions could eventually occur when the input buffer’s
(U1) supplies are different from VDD. In such a case, an input
buffer with a short-circuit current limitation can be used to
protect the part.
C
IN
R
IN
D1
D2
C
PIN
IN+
OR IN–
GND
VDD
02972-027
Figure 28. Equivalent Analog Input Circuit
The analog input structure allows the sampling of the true
differential signal between IN+ and IN−. By using these
differential inputs, signals common to both inputs are rejected,
as shown in Figure 29, which represents the typical CMRR over
frequency.
FREQUENCY (kHz)
CMRR (dB)
90
80
70
60
40
50
1 10 100 1000
02972-028
VDD = 5V
VDD = 2.5V
Figure 29. Analog Input CMRR vs. Frequency
During the acquisition phase, the impedance of the analog
inputs (IN+ or IN−) can be modeled as a parallel combination
of capacitor, C
PIN
, and the network formed by the series
connection of R
IN
and C
IN
. C
PIN
is primarily the pin capacitance.
R
IN
is typically 3 kΩ and is a lumped component made up of
some serial resistors and the on resistance of the switches. C
IN
is
typically 30 pF and is mainly the ADC sampling capacitor.
During the conversion phase, where the switches are opened,
the input impedance is limited to C
PIN
. R
IN
and C
IN
make a
1-pole, low-pass filter that reduces undesirable aliasing effects
and limits the noise.
When the source impedance of the driving circuit is low, the
AD7687 can be driven directly. Large source impedances
significantly affect the ac performance, especially total
harmonic distortion (THD). The dc performances are less
sensitive to the input impedance. The maximum source
impedance depends on the amount of THD that can be
tolerated. The THD degrades as a function of the source
impedance and the maximum input frequency, as shown in
Figure 30.
FREQUENCY (kHz)
THD (dB)
–60
–70
–80
–90
–100
–110
–120
0 25 50 75 100
02972-029
R
S
= 250Ω
R
S
= 100Ω
R
S
= 50Ω
R
S
= 33Ω
Figure 30. THD vs. Analog Input Frequency and Source Resistance