Datasheet
AD7569/AD7669–TIMING CHARACTERISTICS
1
Limit at Limit at
Limit at T
MIN
, T
MAX
T
MIN
, T
MAX
Parameter 258C (All Grades) (J, K, A, B Grades) (S, T Grades) Units Test Conditions/Comments
DAC Timing
t
1
80 80 90 ns min WR Pulse Width
t
2
0 0 0 ns min CS, A/B to WR Setup Time
t
3
0 0 0 ns min CS, A/B to WR Hold Time
t
4
60 70 80 ns min Data Valid to WR Setup Time
t
5
10 10 10 ns min Data Valid to WR Hold Time
ADC Timing
t
6
50 50 50 ns min ST Pulse Width
t
7
110 130 150 ns max ST to BUSY Delay
t
8
20 30 30 ns max BUSY to INT Delay
t
9
0 0 0 ns min BUSY to CS Delay
t
10
0 0 0 ns min CS to RD Setup Time
t
11
60 75 90 ns min RD Pulse Width Determined by t
13
.
t
12
0 0 0 ns min CS to RD Hold Time
t
13
2
60 75 90 ns max Data Access Time after RD; C
L
= 20 pF
95 120 135 ns max Data Access Time after
RD; C
L
= 100 pF
t
14
3
10 10 10 ns min Bus Relinquish Time after RD
60 75 85 ns max
t
15
65 75 85 ns max RD to INT Delay
t
16
120 140 160 ns max RD to BUSY Delay
t
17
2
60 75 90 ns max Data Valid Time after BUSY; C
L
= 20 pF
90 115 135 ns max Data Valid Time after BUSY; C
L
= 100 pF
NOTES
1
Sample tested at +25°C to ensure compliance. All input control signals are specified with t
R
= t
F
= 5 ns (10% to 90% of +5 V) and timed from a voltage level of 1.6 V.
2
t
13
and t
17
are measured with the load circuits of Figure 1 and defined as the time required for an output to cross either 0.8 V or 2.4 V.
3
t
l4
is defined as the time required for the data line to change 0.5 V when loaded with the circuit of Figure 2.
Specifications subject to change without notice.
REV. B
–4–
WARNING!
ESD SENSITIVE DEVICE
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD7569/AD7669 features proprietary ESD protection circuitry, permanent dam-
age may occur on devices subjected to high energy electrostatic discharges. Therefore, proper
ESD precautions are recommended to avoid performance degradation or loss of functionality.
ABSOLUTE MAXIMUM RATINGS
V
DD
to AGND
DAC
or AGND
ADC
. . . . . . . . . . . . .–0.3 V, +7 V
V
DD
to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V, +7 V
V
DD
to V
SS
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V, +14 V
AGND
DAC
or AGND
ADC
to DGND . . . . –0.3 V, V
DD
+ 0.3 V
AGND
DAC
to AGND
ADC
. . . . . . . . . . . . . . . . . . . . . . . . . ±5 V
Logic Voltage to DGND . . . . . . . . . . . . . –0.3 V, V
DD
+ 0.3 V
CLK Input Voltage to DGND . . . . . . . . . –0.3 V, V
DD
+ 0.3 V
V
OUT
(V
OUT
A, V
OUT
B) to
AGND
1
DAC
. . . . . . . . . . . . . . . . . V
SS
– 0.3 V, V
DD
+ 0.3 V
V
IN
to AGND
ADC
. . . . . . . . . . . . . . . V
SS
– 0.3 V, V
DD
+ 0.3 V
NOTE
1
Output may be shorted to any voltage in the range V
SS
to V
DD
provided that the
power dissipation of the package is not exceeded. Typical short circuit current for
a short to AGND or V
SS
is 50 mA.
Figure 1. Load Circuits for Data Access Time Test
a. High-Z to V
OH
Figure 2. Load Circuits for Bus Relinquish Time Test
b. High-Z to V
OL
a. V
OH
to High-Z b. V
OL
to High-Z
Power Dissipation (Any Package) to +75°C . . . . . . . . 450 mW
Derates above 75°C by . . . . . . . . . . . . . . . . . . . . . 6 mW/°C
Operating Temperature Range
Commercial (J, K) . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C
Industrial (A, B) . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C
Extended (S, T) . . . . . . . . . . . . . . . . . . . . –55°C to +125°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Lead Temperature (Soldering, 10 secs) . . . . . . . . . . . +300°C
*Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only; functional operation
of the device at these or any other condition above those indicated in the
operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
(See Figures 8, 10, 12; V
DD
= 5 V 6 5%; V
SS
= 0 V or –5 V 6 5%)