Datasheet

Data Sheet AD7656-1/AD7657-1/AD7658-1
Rev. D | Page 19 of 32
Figure 19 shows the power supply rejection ratio vs. supply
ripple frequency for the AD7656-1/AD7657-1/AD7658-1. The
power supply rejection ratio is defined as the ratio of the power
in the ADC output at full-scale frequency, f, to the power of a
200 mV p-p sine wave applied to the V
DD
and V
SS
supplies of the
ADC at a frequency sampled, f
SAMPLE
, as follows:
PSRR (dB) = 10 log(Pf/Pf
S
)
where:
Pf is equal to the power at Frequency f in the ADC output.
Pf
S
is equal to the power at Frequency f
SAMPLE
coupled onto the
V
DD
and V
SS
supplies.
% FSR
%FSR is calculated using the full theoretical span of the ADC.