Datasheet

AD7612 Data Sheet
Rev. A | Page 28 of 32
External Clock Data Read After/During Conversion
It is also possible to begin to read data after conversion and
continue to read the last bits after a new conversion has been
initiated. This method allows the full throughput and the use of
a slower SDCLK frequency. Again, it is recommended to use a
discontinuous SDCLK whenever possible to minimize potential
incorrect bit decisions. For the different modes, the use of a slower
SDCLK such as 20 MHz in warp mode, 15 MHz in normal mode
and 13 MHz in impulse mode can be used.
SDIN
SDOUT
D0
1 2 3 15 16
BUSY
EXT/INT = 1 INVSCLK = 0
CS
SDCLK
4
D2
D1
17 18
SER/PAR = 1 RD = 0
14
D15
D14
D13
X15 X14
19
X0
X2
X1
X15
X14
X13
Y15 Y14
t
31
t
31
X*
t
32
t
16
t
33
t
34
t
37
t
35
t
36
*A DISCONTINUOUS SDCLK IS RECOMMENDED.
06265-042
Figure 42. Slave Serial Data Timing for Reading (Read After Convert)
SDOUT
D0
123
BUSY
EXT/INT = 1 INVSCLK = 0
CS
SDCLK
15
D1
SER/PAR = 1 RD = 0
16
D15
D14
t
31
t
31
t
32
t
16
t
37
t
35
t
36
CNVST
X*
X*
X* X*
X*
X*
t
27
*A DISCONTINUOUS SDCLK IS RECOMMENDED.
06265-043
DATA = SDIN
Figure 43. Slave Serial Data Timing for Reading (Read Previous Conversion During Convert)