8-Channel DAS with 14-Bit, Bipolar Input, Simultaneous Sampling ADC AD7607 Data Sheet FEATURES APPLICATIONS 8 simultaneously sampled inputs True bipolar analog input ranges: ±10 V, ±5 V Single 5 V analog supply and 2.3 V to 5.
AD7607 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 ADC Transfer Function ............................................................. 20 Applications ....................................................................................... 1 Internal/External Reference ...................................................... 21 Functional Block Diagram ..............................................................
Data Sheet AD7607 GENERAL DESCRIPTION The AD76071 is a 14-bit, simultaneous sampling, analog-todigital data acquisition system (DAS). The part contains analog input clamp protection; a second-order antialiasing filter; a trackand-hold amplifier; a 14-bit charge redistribution, successive approximation analog-to-digital converter (ADC); a flexible digital filter; a 2.5 V reference and reference buffer; and high speed serial and parallel interfaces.
AD7607 Data Sheet SPECIFICATIONS VREF = 2.5 V external/internal, AVCC = 4.75 V to 5.25 V, VDRIVE = 2.3 V to 5.25 V, fSAMPLE = 200 kSPS, TA = TMIN to TMAX, unless otherwise noted. 1 Table 2.
Data Sheet Parameter REFERENCE INPUT/OUTPUT Reference Input Voltage Range DC Leakage Current Input Capacitance7 Reference Output Voltage Reference Temperature Coefficient LOGIC INPUTS Input High Voltage (VINH) Input Low Voltage (VINL) Input Current (IIN) Input Capacitance (CIN)7 LOGIC OUTPUTS Output High Voltage (VOH) Output Low Voltage (VOL) Floating-State Leakage Current Floating-State Output Capacitance7 Output Coding CONVERSION RATE Conversion Time Track-and-Hold Acquisition Time Throughput Rate POWER R
AD7607 Data Sheet TIMING SPECIFICATIONS AVCC = 4.75 V to 5.25 V, VDRIVE = 2.3 V to 5.25 V, VREF = 2.5 V external reference/internal reference, TA = TMIN to TMAX, unless otherwise noted. 1 Table 3. Parameter PARALLEL/SERIAL/BYTE MODE tCYCLE Limit at TMIN, TMAX Min Typ Max Unit 5 µs 9.1 µs µs tWAKE-UP STANDBY 4.15 9.1 18.8 39 78 158 315 100 µs µs µs µs µs µs µs µs tWAKE-UP SHUTDOWN Internal Reference 30 ms External Reference 13 ms 5 tCONV 3.45 7.87 16.
Data Sheet Parameter t13 AD7607 Limit at TMIN, TMAX Min Typ Max Unit 16 20 25 30 ns ns ns ns 16 21 25 32 22 ns ns ns ns ns ns ns 23.5 17 14.5 11.5 MHz MHz MHz MHz 15 20 30 ns ns ns 17 23 27 34 ns ns ns ns ns ns 22 ns 15 20 25 30 15 20 25 30 ns ns ns ns ns ns ns ns ns 16 20 25 30 ns ns ns ns t143 t15 t16 t17 6 6 SERIAL READ OPERATION fSCLK t18 t19 3 t20 t21 t22 t23 0.4 tSCLK 0.
AD7607 Data Sheet Limit at TMIN, TMAX Min Typ Max Parameter t27 Unit 19 24 ns ns 17 22 24 ns ns ns t28 t29 Description Delay from RD falling edge to FRSTDATA low VDRIVE = 3.3 V to 5.25 V VDRIVE = 2.3 V to 2.7 V Delay from 16th SCLK falling edge to FRSTDATA low VDRIVE = 3.3 V to 5.25 V VDRIVE = 2.3 V to 2.7 V Delay from CS rising edge until FRSTDATA three-state enabled Sample tested during initial release to ensure compliance.
Data Sheet AD7607 t12 CS AND RD t16 t13 DATA: DB[15:0] V2 V3 V4 V5 V6 V7 V8 08096-005 V1 t17 FRSTDATA Figure 5. Linked Parallel Mode, CS and RD CS t21 SCLK t20 t19 t18 DOUTA, DOUTB DB13 t22 DB12 DB11 t23 DB1 DB0 t29 t28 08096-006 t25 FRSTDATA Figure 6. Serial Read Operation (Channel 1) CS t8 t9 t10 t16 t13 DATA: DB[7:0] INVALID HIGH BYTE V1 t14 t15 LOW BYTE V1 HIGH BYTE V8 t26 FRSTDATA t27 t24 Figure 7. BYTE Mode Read Operation Rev.
AD7607 Data Sheet ABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise noted. THERMAL RESISTANCE Table 4.
Data Sheet AD7607 64 63 62 61 60 59 58 V1GND V1 V2 V3 V2GND V4 V3GND V5 V4GND V6 V5GND V6GND V7 V7GND V8 V8GND PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 57 56 55 54 53 52 51 50 49 AVCC 1 ANALOG INPUT 48 PIN 1 AGND 2 OS 0 3 DECOUPLING CAP PIN AVCC 47 AGND 46 REFGND POWER SUPPLY OS 1 4 45 REFCAPB GROUND PIN OS 2 5 44 REFCAPA AD7607 43 REFGND TOP VIEW (Not to Scale) 42 REFIN/REFOUT 41 AGND CONVST A 9 40 AGND CONVST B 10 39 REGCAP RESET 11 38 AVCC RD/SCLK
AD7607 Data Sheet Pin No. 9, 10 Type 1 DI Mnemonic CONVST A, CONVST B 11 DI RESET 12 DI RD/SCLK 13 DI CS 14 DO BUSY 15 DO FRSTDATA 22 to 16 DO DB[6:0] 23 P VDRIVE 24 DO DB7/DOUTA 25 DO DB8/DOUTB 31 to 27 DO DB[13:9] Description Conversion Start Input A, Conversion Start Input B. Logic inputs. These logic inputs are used to initiate conversions on the analog input channels.
Data Sheet AD7607 Pin No. 32 Type 1 DO/DI Mnemonic DB14/HBEN 33 DO/DI DB15/ BYTE SEL 34 DI REF SELECT 36, 39 P REGCAP 42 REF REFIN/ REFOUT 43, 46 44, 45 REF REF 49, 51, 53, 55, 57, 59, 61, 63 50, 52, 54, 56, 58, 60, 62, 64 AI REFGND REFCAPA, REFCAPB V1 to V8 1 AI GND V1GND to V8GND Description Parallel Output Data Bit 14 (DB14)/High Byte Enable (HBEN). When PAR/SER/BYTE SEL = 0, this pin acts as a three-state parallel digital output pin.
AD7607 Data Sheet TYPICAL PERFORMANCE CHARACTERISTICS 0 0.5 AVCC = VDRIVE = 5V INTERNAL REFERENCE fSAMPLE = 200kSPS TA = 25°C ±10V RANGE SNR: 85.07dB THD: –107.33dB 16,384 POINT FFT fIN = 1kHz –40 SNR (dB) –60 AVCC = VDRIVE = 5V INTERNAL REFERENCE fSAMPLE = 200kSPS TA = 25°C ±10V RANGE 0.4 0.3 0.2 DNL (LSB) –20 –80 –100 0.1 0 –0.1 –0.2 –120 –0.3 –140 10 20 30 40 50 60 70 80 90 100 INPUT FREQUENCY (kHz) –0.
Data Sheet AD7607 10 5.00 3.75 8 ±10V RANGE 1.25 ±5V RANGE 0 –1.25 –2.50 –25 –10 5 20 35 50 65 80 TEMPERATURE (°C) 2 AVCC, VDRIVE = 5V FSAMPLE = 200 kSPS TA = 25°C EXTERNAL REFERENCE SOURCE RESISTANCE IS MATCHED ON THE VxGND INPUT ±10V AND ±5V RANGE –2 08096-115 –5.00 –40 4 0 200kSPS AVCC, VDRIVE = 5V EXTERNAL REFERENCE –3.75 6 0 20k 40k 60k 80k 100k 120k SOURCE RESISTANCE (Ω) Figure 15. NFS Error vs. Temperature 08096-118 PFS/NFS ERROR (%FS) NFS ERROR (LSB) 2.
AD7607 Data Sheet 0.25 –40 ±5V RANGE AVCC, VDRIVE = +5V –50 fSAMPLE = 200kSPS RSOURCE MATCHED ON Vx AND VxGND INPUTS 0.15 –60 0.10 –70 THD (dB) 0 5V RANGE –0.05 10V RANGE –100 –0.15 –0.25 –40 200kSPS AVCC, VDRIVE = 5V EXTERNAL REFERENCE –25 –10 5 20 35 50 65 80 TEMPERATURE (°C) –110 –120 1k 10k 100k INPUT FREQUENCY (Hz) Figure 21. Bipolar Zero Code Error vs. Temperature Figure 24. THD vs. Input Frequency for Various Source Impedances, ±5 V Range 1.00 2.5010 0.75 2.
Data Sheet AD7607 –50 18 16 14 12 AVCC, VDRIVE = 5V 10 TA = 25°C INTERNAL REFERENCE fSAMPLE VARIES WITH OS RATE 8 NO OS OS2 OS4 OS8 OS16 OS32 OS64 OVERSAMPLING RATIO 08096-127 AVCC SUPPLY CURRENT (mA) 20 Figure 27. Supply Current vs.
AD7607 Data Sheet TERMINOLOGY Integral Nonlinearity The maximum deviation from a straight line passing through the endpoints of the ADC transfer function. The endpoints of the transfer function are zero scale, at ½ LSB below the first code transition; and full scale, at ½ LSB above the last code transition. Differential Nonlinearity The difference between the measured and the ideal 1 LSB change between any two adjacent codes in the ADC.
Data Sheet AD7607 THEORY OF OPERATION CONVERTER DETAILS Analog Input Clamp Protection The AD7607 is a data acquisition system that employs a high speed, low power, charge redistribution, successive approximation analog-to-digital converter (ADC) and allows the simultaneous sampling of eight analog input channels. The analog inputs on the AD7607 can accept true bipolar input signals. The RANGE pin is used to select either ±10 V or ±5 V as the input range. The AD7607 operates from a single 5 V supply.
AD7607 Data Sheet Analog Input Antialiasing Filter The end of the conversion process across all eight channels is indicated by the falling edge of BUSY, and it is at this point that the track-and-holds return to track mode and the acquisition time for the next set of conversions begins. An analog antialiasing filter (a second-order Butterworth) is also provided on the AD7607. Figure 33 and Figure 34 show the frequency and phase response, respectively, of the analog antialiasing filter.
Data Sheet AD7607 INTERNAL/EXTERNAL REFERENCE Internal Reference Mode The AD7607 contains an on-chip 2.5 V bandgap reference. The REFIN/REFOUT pin allows access to the 2.5 V reference that generates the on-chip 4.5 V reference internally, or it allows an external reference of 2.5 V to be applied to the AD7607. An externally applied reference of 2.5 V is also gained up to 4.5 V, using the internal buffer. This 4.5 V buffered reference is the reference used by the SAR ADC.
AD7607 Data Sheet TYPICAL CONNECTION DIAGRAM The power-down mode is selected through the state of the RANGE pin when the STBY pin is low. Table 7 shows the configurations required to choose the desired power-down mode. When the AD7607 is placed in standby mode, current consumption is 8 mA maximum and power-up time is approximately 100 µs because the capacitor on the REFCAPA and REFCAPB pins must charge up.
Data Sheet AD7607 CONVERSION CONTROL This is accomplished by pulsing the two CONVST pins independently and is possible only if oversampling is not in use. CONVST A is used to initiate simultaneous sampling of the first set of channels (V1 to V4), and CONVST B is used to initiate simultaneous sampling on the second set of analog input channels (V5 to V8), as illustrated in Figure 40. Simultaneous Sampling on All Analog Input Channels The AD7607 allows simultaneous sampling of all analog input channels.
AD7607 Data Sheet DIGITAL INTERFACE The AD7607 provides three interface options: a parallel interface, a high speed serial interface, and a parallel byte interface. The required interface mode is selected via the PAR/SER/BYTE SEL and the DB15/BYTE SEL pins. Table 8. Interface Mode Selection PAR/SER/BYTE SEL 0 1 1 DB15 0 0 1 Interface Mode Parallel interface mode Serial interface mode Parallel byte interface mode Interface mode operation is discussed in the following sections.
Data Sheet AD7607 Figure 42 shows a read of eight simultaneous conversion results using two DOUT lines on the AD7607. In this case, a 56 SCLK transfer is used to access data from the AD7607, and CS is held low to frame the entire 56 SCLK cycles. Data can also be clocked out using just one DOUT line; in which case, it is recommended that DOUTA be used to access all conversion data because the channel data is output in ascending order.
AD7607 Data Sheet DIGITAL FILTER The AD7607 contains an optional first-order digital sinc filter that should be used in applications where slower throughput rates are used and digital filtering is required. The oversampling ratio of the digital filter is controlled using the oversampling pins, OS[2:0] (see Table 9). OS 2 is the MSB control bit, and OS 0 is the LSB control bit. Table 9 lists the oversampling bit decoding to select the different oversample rates.
Data Sheet AD7607 –10 –20 –30 –40 –50 –60 –30 –70 –40 –80 –50 –90 100 –60 10k 100k 1M 10M Figure 47. Digital Filter Response for Oversampling by 16 0 100k 1M 10M FREQUENCY (Hz) –10 –20 ATTENUATION (dB) Figure 44.
AD7607 Data Sheet 2000 1600 Figure 51 shows that the conversion time extends as the oversampling rate is increased. To achieve the fastest throughput rate possible when oversampling is turned on, the read can be performed during the BUSY high time. The falling edge of BUSY is used to update the output data registers with the new conversion data; therefore, the reading of conversion data should not occur on this edge.
Data Sheet AD7607 LAYOUT GUIDELINES Figure 52 shows the recommended decoupling on the top layer of the AD7607 board. Figure 53 shows bottom layer decoupling, which is used for the four AVCC pins and the VDRIVE pin. The printed circuit board that houses the AD7607 should be designed so that the analog and digital sections are separated and confined to different areas of the board. At least one ground plane should be used. It can be common or split between the digital and analog sections.
AD7607 Data Sheet To ensure good device-to-device performance matching in a system that contains multiple AD7607 devices, a symmetrical layout between the devices is important. Figure 54 shows a layout with two AD7607 devices. The AVCC supply plane runs to the right of both devices. The VDRIVE supply track runs to the left of the two AD7607 devices. The reference chip is positioned between the two AD7607 devices, and the reference voltage track runs north to Pin 42 of U1 and south to Pin 42 of U2.
Data Sheet AD7607 OUTLINE DIMENSIONS 0.75 0.60 0.45 12.20 12.00 SQ 11.80 1.60 MAX 64 49 1 48 PIN 1 10.20 10.00 SQ 9.80 TOP VIEW (PINS DOWN) 0.15 0.05 SEATING PLANE 0.20 0.09 7° 3.5° 0° 0.08 COPLANARITY VIEW A 16 33 32 17 VIEW A 0.50 BSC LEAD PITCH 0.27 0.22 0.17 ROTATED 90° CCW COMPLIANT TO JEDEC STANDARDS MS-026-BCD 051706-A 1.45 1.40 1.35 Figure 55.
AD7607 Data Sheet NOTES ©2010-2012 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D08096-0-1/12(B) Rev.
