Datasheet

REV. B
–2–
AD7575–SPECIFICATIONS
(V
DD
= +5 V, V
REF
= +1.23 V, AGND = DGND = 0 V; f
CLK
= 4 MHz external;
all specifications T
MIN
to T
MAX
unless otherwise noted)
Parameter J, A Versions
1
K, B Versions S Version T Version Units Conditions/Comments
ACCURACY
Resolution 8 8 8 8 Bits
Total Unadjusted Error ±2 ±1 ±2 ±1 LSB max
Relative Accuracy ±1 ±1/2 ±1 ±1/2 LSB max
Minimum Resolution for Which
No Missing Codes Is Guaranteed 8 8 8 8 Bits max
Full-Scale Error
+25°C ±1 ±1 ±1 ±1 LSB max Full-Scale TC Is Typically 5 ppm/°C
T
MIN
to T
MAX
±1 ±1 ±1 ±1 LSB max
Offset Error
2
+25°C ±1/2 ±1/2 ±1/2 ±1/2 LSB max Offset TC Is Typically 5 ppm/°C
T
MIN
to T
MAX
±1/2 ±1/2 ±1/2 ±1/2 LSB max
ANALOG INPUT
Voltage Range 0 to 2 V
REF
0 to 2 V
REF
0 to 2 V
REF
0 to 2 V
REF
Volts 1 LSB = 2 V
REF
/256; See Figure 16
DC Input Impedance 10 10 10 10 M min
Slew Rate, Tracking 0.386 0.386 0.386 0.386 V/µs max
SNR
3
45 45 45 45 dB min V
IN
= 2.46 V p-p @ 10 kHz; See Figure 11
REFERENCE INPUT
V
REF
(For Specified Performance) 1.23 1.23 1.23 1.23 Volts ±5%
I
REF
500 500 500 500 µA max
LOGIC INPUTS
CS, RD
V
INL
, Input Low Voltage 0.8 0.8 0.8 0.8 V max
V
INH
, Input High Voltage 2.4 2.4 2.4 2.4 V min
I
IN
, Input Current
+25°C ±1 ±1 ±1 ±1 µA max V
IN
= 0 or V
DD
T
MIN
to T
MAX
±10 ±10 ±10 ±10 µA max V
IN
= 0 or V
DD
C
IN
, Input Capacitance
3
10 10 10 10 pF max
CLK
V
lNL
, Input Low Voltage 0.8 0.8 0.8 0.8 V max
V
INH
, Input High Voltage 2.4 2.4 2.4 2.4 V min
I
INL
, Input Low Current 700 700 800 800 µA max V
INL
= 0 V
I
INH
, Input High Current 700 700 800 800 µA max V
INH
= V
DD
LOGIC OUTPUTS
BUSY, DB0 to DB7
V
OL
, Output Low Voltage 0.4 0.4 0.4 0.4 V max I
SINK
= 1.6 mA
V
OH
, Output High Voltage 4.0 4.0 4.0 4.0 V min I
SOURCE
= 40 µA
DB0 to DB7
Floating State Leakage Current ±1 ±1 ±10 ±10 µA max V
OUT
= 0 to V
DD
Floating State Output
Capacitance
3
10 10 10 10 pF max
CONVERSION TIME
4
With External Clock 5 5 5 5 µsf
CLK
= 4 MHz
With Internal Clock, T
A
= +25°C5 5 5 5 µs min Using Recommended Clock
15 15 15 15 µs max Components Shown in Figure 15
POWER REQUIREMENTS
5
V
DD
+5 +5 +5 +5 Volts ±5% for Specified Performance
I
DD
6 6 7 7 mA max Typically 3 mA with V
DD
= +5 V
Power Dissipation 15 15 15 15 mW typ
Power Supply Rejection ±1/4 ±1/4 ±1/4 ±1/4 LSB max 4.75 V V
DD
5.25 V
NOTES
1
Temperature ranges are as follows:
J, K Versions; 0°C to +70°C
A, B Versions; –25°C to +85°C
S, T Versions; –55°C to +125°C
2
Offset error is measured with respect to an ideal first code transition that occurs at 1/2 LSB.
3
Sample tested at +25°C to ensure compliance.
4
Accuracy may degrade at conversion times other than those specified.
5
Power supply current is measured when AD7575 is inactive i.e., when CS = RD = BUSY = logic HIGH.
Specifications subject to change without notice.