Datasheet

AD7538
Rev. B | Page 7 of 16
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
V
REF
1
R
FB
2
I
OUT
3
AGND 4
V
SS
24
V
DD
23
WR
22
CS 21
DGND 5
(MSB) DB13 6
DB12
7
LDAC 20
DB0 (LSB) 19
DB1
18
DB11 8 DB2 17
DB10 9 DB3 16
DB9 10 DB4 15
DB8
11
DB5
14
DB7 12 DB6 13
AD7538
TOP VIEW
(Not to Scale)
0
1139-003
Figure 3. Pin Configuration
Table 5. Pin Function Description
Pin No. Mnemonic Description
1 V
REF
Voltage Reference.
2 R
FB
Feedback Resistor. Used to close the loop around an external op amp.
3 I
OUT
Current Output Terminal.
4 AGND Analog Ground
5 DGND Digital Ground.
6 to 19 DB13 to DB0 Data Inputs. Bit DB13 (MSB) to Bit DB0 (LSB).
20
LDAC
Chip Select Input. Active low.
21
CS
Asynchronous Load DAC Input. Active low.
22
WR
Write Input. Active low.
CS
LDAC WR
Operation
0 1 0 Load input register.
1 0 X
1
Load DAC register from input register.
0 0 0 Input and DAC registers are transparent.
1 1 X
1
No operation.
XX
1
1 1 No operation.
23 V
DD
+12 V to +15 V Supply Input.
24 V
SS
Bias pin for high temperature low leakage configuration. To implement low leakage system, the pin should be
at a negative voltage. See Figure 6 and Figure 8 for recommended circuitry.
1
X = don’t care.