Datasheet

AD7538
Rev. B | Page 12 of 16
PROGRAMMABLE GAIN AMPLIFIER
The circuit shown in Figure 9 provides a programmable gain
amplifier (PGA). In it the DAC behaves as a programmable
resistance and thus allows the circuit gain to be digitally
controlled.
AD7538
N
I
OUT
V
DD
V
DD
V
SS
V
OUT
V
IN
V
REF
GND
DIGITAL
INPUT
A
A
R
FB
NOTES
1. RESISTOR R
FB
IS ACTUALLY
INCLUDED ON THE DICE.
01139-009
Figure 9. Programmable Gain Amplifier (PGA)
The transfer function of Figure 9 is:
FB
EQ
IN
OUT
R
R
V
V
Gain −==
(1)
R
EQ
is the equivalent transfer impedance of the DAC from the
V
REF
pin to the I
OUT
pin and can be expressed as
N
R
R
IN
n
EQ
2
= (2)
where:
n is the resolution of the DAC.
N is the DAC input code in decimal.
R
IN
is the constant input impedance of the DAC (R
IN
= R
LAD
).
Substituting this expression into Equation 1 and assuming
zero gain error for the DAC (R
IN
= R
FB
), the transfer function
simplifies to
NV
V
n
IN
OUT
2
−=
(3)
The ratio N/2
n
is commonly represented by the term, D, and, as
such, is the fractional representation of the digital input word.
DNV
V
n
IN
OUT
12 −
=
−
−= (4)
Equation 4 indicates that the gain of the circuit can be varied
from 16,384 down to unity (actually 16,384/16,383) in 16,383
steps. The all 0s code is never applied. This avoids an open-loop
condition thereby saturating the amplifier. With the all 0s code
excluded there remains (2
n
– 1) possible input codes allowing a
choice of (2
n
– 1) output levels. In decibels the dynamic range is
(
)
dB8412log20log20
1010
=−=
n
IN
OUT
V
V