Datasheet

AD7492
Rev. A | Page 19 of 24
ADSP-21065Lto AD7492 Interface
Figure 30 shows a typical interface between the AD7492 and the
ADSP-21065L SHARC® processor. This interface is an example
of one of three DMA handshake modes. The
MS
X
control line is
actually three memory select lines. Internal ADDR25–24 are
decoded into
MS
3-0
, these lines are then asserted as chip selects.
The
DMAR
1
(DMA Request 1) is used in this setup as the
interrupt to signal end of conversion. The rest of the interface is
standard handshaking operation.
AD7492
ADDRESS BUS
DATA BUS
1
ADDITIONAL PINS OMITTED FOR CLARITY.
OPTIONAL
ADDRESS
DECODER
ADDRESS
LATCH
ADDRESS
BUS
ADSP-21065L
1
ADDR
0
TO
ADDR
23
MS
X
DMAR
1
RD
BUSY
DB0 TO DB9
(DB11)
CONVST
CS
RD
D0 TO 31
01128-030
Figure 30. ADSP-21065L to AD7492 Interface
TMS320C25 to AD7492 Interface
Figure 31 shows an interface between the AD7492 and the
TMS320C25. The
CONVST
signal can be applied from the
TMS320C25 or from an external source. The BUSY line
interrupts the digital signal processor when conversion is
completed. The TMS320C25 does not have a separate
RD
output to drive the AD7492
RD
input directly. This has to be
generated from the processor
STRB
and R/
W
outputs with the
addition of some glue logic. The
RD
signal is OR-gated with the
MSC signal to provide the WAIT state required in the read cycle
for correct interface timing. The following instruction is used to
read the conversion from the AD7492:
IN D,ADC
where:
D is the data memory address.
ADC is the AD7492 address.
The read operation must not be attempted during conversion.
ADDRESS BUS
1
ADDITIONAL PINS OMITTED FOR CLARITY.
OPTIONAL
DATA BUS
TMS320C25
1
IS
STRB
READY
MSC
R/W
AD7492
ADDRESS
DECODER
BUSY
DB0 TO DB9
(DB11)
CONVST
CS
RD
DMD0 TO DMD15
A0 TO A15
01128-031
Figure 31. TMS320C25 to AD7492 Interface
PIC17C4x to AD7492 Interface
Figure 32 shows a typical parallel interface between the AD7492
and PIC17C4x. The microcontroller sees the ADC as another
memory device with its own specific memory address on the
memory map. The
CONVST
signal can be controlled by either
the microcontroller or an external source. The BUSY signal
provides an interrupt request to the microcontroller when a
conversion ends. The INT pin on the PIC17C4x must be
configured to be active on the negative edge. Port C and Port D
of the microcontroller are bidirectional and used to address the
AD7492 and to read in the 12-bit data. The
OE
pin on the PIC
can be used to enable the output buffers on the AD7492 and
perform a read operation.
1
ADDITIONAL PINS OMITTED FOR CLARITY.
OPTIONAL
PIC17C4x
1
OE
INT
ALE
AD7492
ADDRESS
LATCH
BUSY
DB0 TO DB9
(DB11)
CONVST
CS
RD
ADDRESS
DECODER
01128-032
AD0 TO AD15
Figure 32. PIC17C4x to AD7492 Interface