Datasheet

Data Sheet AD7490
Rev. D | Page 17 of 28
When no amplifier is used to drive the analog input, the source
impedance should be limited to low values. The maximum
source impedance depends on the amount of total harmonic
distortion (THD) that can be tolerated. The THD increases as
the source impedance increases, and performance degrades (see
Figure 9).
ADC TRANSFER FUNCTION
The output coding of the AD7490 is either straight binary or
twos complement depending on the status of the LSB
(CODING bit) in the control register. The designed code
transitions occur midway between successive LSB values (that
is, 1 LSB, 2 LSBs, and so on). The LSB size is equal to
REF
IN
/4096. The ideal transfer characteristic for the AD7490
when straight binary coding is selected is shown in Figure 18.
02691-017
111...111
111. ..110
111...000
000...010
011...111
000...001
000...000
0V
1LSB +V
REF
– 1LSB
1LSB = V
REF
/4096
V
REF
IS EITHER REF
IN
OR 2 × REF
IN
ANALOG INPUT
Figure 18. Straight Binary Transfer Characteristic
Handling Bipolar Input Signals
Figure 20 shows how useful the combination of the 2 × REF
IN
input range and the twos complement output coding scheme is
for handling bipolar input signals. If the bipolar input signal is
biased about REF
IN
and twos complement output coding is
selected, REF
IN
becomes the zero code point, −REF
IN
is negative
full scale, and +REF
IN
becomes positive full scale, with a
dynamic range of 2 × REF
IN
.
02691-018
011...111
011...110
000...001
000...000
111...111
100...010
100...001
100...000
+V
REF
– 1LSB–V
REF
+ 1LSB
1LSB = 2 × V
REF
/4096
V
REF
– 1LSB
ANALOG INPUT
ADC CODE
Figure 19. Twos Complement Transfer Characteristic
with REF
IN
± REF
IN
Input Range
02691-019
V
REF
REF
IN
V
IN
0
DOUT
TWOS
COMPLEMENT
DSP/µP
V
DRIVE
V
DD
V
DD
AD7490
V
IN
15
V
0
V
V
0.1µF
R3
R1 = R2 = R3 = R4
R2
R1
R4
+REF
IN
(= 2 × REF
IN
)
–REF
IN
(= 0V)
REF
IN
011...111
000...000
100...000
Figure 20. Handling Bipolar Signals