Datasheet

AD7476/AD7477/AD7478
Rev. F | Page 16 of 24
To exit this mode of operation and power up the AD7476/
AD7477/AD7478 again, perform a dummy conversion. On the
falling edge of
CS
, the device begins to power up, and continues
to power up as long as
CS
is held low until after the falling edge
of the tenth SCLK. The device is fully powered up once 16
SCLKs have elapsed and, as shown in , valid data
results from the next conversion. If
Figure 21
CS
is brought high before
the tenth falling edge of SCLK, the AD7476/AD7477/AD7478
again goes back into power-down. This avoids accidental
power-up due to glitches on the
CS
line or an inadvertent burst
of eight SCLK cycles while
CS
is low. Although the device may
begin to power up on the falling edge of
CS
, it powers down
again on the rising edge of
CS
as long as it occurs before the
tenth SCLK falling edge.
Power-Down Mode
This mode is intended for use in applications where slower
throughput rates are required; either the ADC is powered
between each conversion, or a series of conversions can be
performed at a high throughput rate and the ADC is then
powered down for a relatively long duration between these
bursts of several conversions. When the AD7476/AD7477/
AD7478 is in power-down mode, all analog circuitry is
powered down.
To enter power-down, the conversion process must be
interrupted by bringing
CS
high any time after the second
falling edge of SCLK and before the tenth falling edge of SCLK,
as shown in . Once Figure 20
CS
is brought high in this window
of SCLKs, the part enters power-down and the conversion
initiated by the falling edge of
CS
is terminated and SDATA
goes back into three-state.
If
CS
is brought high before the second SCLK falling edge, the
part remains in normal mode and does not power down. This
avoids accidental power-down due to glitches on the
CS
line.
4 LEADING ZEROS + CONVERSION RESULT
CS
SCLK
S
DAT
A
1 10 16
01024-019
Figure 19. Normal Mode Operation
110162
THREE-STATE
CS
SCLK
S
DAT
A
01024-020
Figure 20. Entering Power-Down Mode
16101 161
A
CS
SCLK
SDATA
INVALID DATA VALID DATA
THE PART BEGINS
TO POWER UP
THE PART IS FULLY POWERED
UP WITH V
IN
FULLY ACQUIRED
01024-021
Figure 21. Exiting Power-Down Mode