Datasheet

AD7452
Rev. B | Page 9 of 28
Positive Gain Error
This is the deviation of the last code transition (011...110 to
011...111) from the ideal V
IN+
– V
IN–
(i.e., V
REF
– 1 LSB), after the
zero code error has been adjusted out.
Negative Gain Error
This is the deviation of the first code transition (100...000 to
100...001) from the ideal V
IN+
– V
IN–
(i.e., –V
REF
+ 1 LSB), after
the zero code error has been adjusted out.
Track-and-Hold Acquisition Time
The minimum time required for the track-and-hold amplifier to
remain in track mode for its output to reach and settle to within
0.5 LSB of the applied input signal.
Power Supply Rejection Ratio (PSRR)
The ratio of the power in the ADC output at full-scale fre-
quency, f, to the power of a 100 mV p-p sine wave applied to the
ADC V
DD
supply of frequency f
S
. The frequency of this input
varies from 1 kHz to 1 MHz.
PSRR(dB) = 10log(Pf/Pf
S
)
Pf is the power at frequency f in the ADC output; Pfs is the
power at frequency f
S
in the ADC output.