Datasheet
AD7440/AD7450A
Rev. C | Page 20 of 28
Example 1
Table 6. Examples of Suitable Voltage References
Output
Voltage (V)
Initial
Accuracy (%)
Operating
Current (μA)
V
IN
max = V
DD
+ 0.3
V
IN
max = V
REF
+ V
REF
/2
Reference
AD780 2.5/3 0.04 1000
If V
DD
= 5 V, then V
IN
max = 5.3 V.
Therefore
3 × V
REF
/2 = 5.3 V
V
REF
max = 3.5 V
Thus, when operating at V
DD
= 5 V, the value of V
REF
can range
from 100 mV to a maximum value of 3.5 V. When V
DD
= 4.75 V,
V
REF
max = 3.17 V.
Example 2
V
IN
max = V
DD
+ 0.3
V
IN
max = V
REF
+ V
REF
/2
If V
DD
= 3 V, then V
IN
max = 3.3 V.
Therefore,
3 × V
REF
/2 = 3.3 V
V
REF
max = 2.2 V
Thus, when operating at V
DD
= 3 V, the value of V
REF
can range
from 100 mV to a maximum value of 2.2 V. When V
DD
= 2.7 V,
V
REF
max = 2 V.
These examples show that the maximum reference applied to
the AD7440/AD7450A is directly dependent on the value
applied to V
DD
.
The value of the reference sets the analog input span and the
common-mode voltage range. Errors in the reference source
result in gain errors in the AD7440/AD7450A transfer function
and add to specified full-scale errors on the part. A 0.1 μF
capacitor should be used to decouple the V
REF
pin to GND.
Figure 38 shows a typical connection diagram for the V
REF
pin.
Tabl e 6 lists examples of suitable voltage references.
03051-A-038
1
AD780
NC
8
2
V
IN
NC
7
3
GND
6
4
TEMP
5
OPSEL
TRIM
V
OUT
AD7440/
AD7450A*
V
REF
2.5V
NC
V
DD
NC
V
DD
NC = NO CONNECT
10nF 0.1μF
0.1μF
0.1μF
*ADDITIONAL PINS OMITTED FOR CLARITY
Figure 38. Typical V
REF
Connection Diagram for V
DD
= 5 V
ADR421 2.5 0.04 500
ADR420 2.048 0.05 500
SINGLE-ENDED OPERATION
When supplied with a 5 V power supply, the AD7440/AD7450A
can handle a single-ended input. The design of these devices is
optimized for differential operation, so with a single-ended
input, performance degrades. Linearity degrades by typically
0.2 LSB, the full-scale errors degrade typically by 1 LSB, and ac
performance is not guaranteed.
To operate the AD7440/AD7450A in single-ended mode, the
V
input is coupled to the signal source, while the V
IN+ IN–
input is
biased to the appropriate voltage corresponding to the midscale
code transition. This voltage is the common mode, which is a
fixed dc voltage (usually the reference). The V
IN+
input swings
around this value and should have a voltage span of 2 × V
REF
to
make use of the full dynamic range of the part. The input signal
therefore has peak-to-peak values of common mode ±V
REF
. If
the analog input is unipolar, an op amp in a noninverting unity
gain configuration can be used to drive the V
IN+
pin. The ADC
operates from a single supply, so it is necessary to level shift
ground-based bipolar signals to comply with the input
requirements. An op amp can be configured to rescale and level
shift the ground-based bipolar signal, so it is compatible with
the selected input range of the AD7440/AD7450A (
Figure 39).
03051-A-039
R
5V
2.5V
0V
+2.5V
0V
–2.5V
R
R
0.1μF
R
AD7440/
AD7450A
V
REF
V
IN+
V
IN–
V
IN
EXTERNAL
V
REF
(2.5V)
Figure 39. Applying a Bipolar Single-Ended Input to the AD7440/AD7450A