Datasheet

REV. C
AD744
–9–
Table II. Recommended Values of C
COMP
vs. Various Load Conditions for the Circuits of
Figures 31 and 32.
Max Slew –3 dB
R1 R2 Gain Gain C
LOAD
C
COMP
C
LEAD
Rate Bandwidth
()() Follower Inverter (pF) (pF) (pF) (V/s) (MHz)
4.99 k 4.99 k 2 1 50 0 7 75 2.5
1
4.99 k 4.99 k 2 1 150 5 7 37 2.3
1
4.99 k 4.99 k 2 1 1000 20 14 1.2
4.99 k 4.99 k 2 1 >2000 25 12.5
2
1.0
499 4.99 k 11 10 270 0 75 1.2
499 4.99 k 11 10 390 2 50 0.85
499 4.99 k 11 10 1000 5 37
2
0.60
NOTES
1
Bandwidth with C
LEAD
adjusted for minimum settling time.
2
Into large capacitive loads the AD744’s 25 mA output current limit sets the slew rate of the amplifier, in V/ µs, equal to 0.025
amps divided by the value of C
LOAD
in µF. Slew rate is specified into rated max C
LOAD
except for cases marked
2
, which are
specified with a 50 pF. load.
AD744
1F
0.1F
V
S
C
COMP
1F
0.1F
+V
S
V
OUT
V
IN
OPTIONAL
R2*
C
LEAD
*
R1*
*SEE TABLE II
Figure 32. AD744 Connected as an Inverting Amplifier
Operating at Gains of 1 or Greater
Using Decompensation to Extend the Gain Bandwidth
Product
When the AD744 is used in applications where the closed-loop
gain is greater than 10, gain bandwidth product may be enhanced
by connecting a small capacitor between Pins 1 and 5 (Figure
33). At low frequencies, this capacitor cancels the effects of the
chip’s internal compensation capacitor, C
COMP
, effectively dec-
ompensating the amplifier.
Due to manufacturing variations in the value of the internal
C
COMP
, it is recommended that the amplifier’s response be
optimized for the desired gain by using a 2 to 10 pF trimmer
capacitor rather than using a fixed value.
\
AD744
1F
0.1F
V
S
1F
0.1F
+V
S
V
OUT
V
IN
NOT CONNECTED
R2*
R1*
2 10pF
*SEE TABLE III
Figure 33. Using the Decompensation Connection to
Extend Gain Bandwidth
Table III. Performance Summary for the Circuit of Figure 33
R1 R2 Gain Gain –3 dB Gain/BW
()() Follower Inverter Bandwidth Product
1 k 10 k 11 10 2.5 MHz 25 MHz
100 10 k 101 100 760 kHz 76 MHz
100 100 k 1001 1000 225 kHz 225 MHz