Datasheet

REV. C
AD744
–5–
Figure 10. Open-Loop Gain and
Phase Margin vs. Frequency
C
COMP
= 0 pF
Figure 13. Common-Mode and
Power Supply Rejection vs.
Frequency
Figure 16. Total Harmonic Distortion
vs. Frequency, Circuit of Figure 20
(G = 10)
Figure 11. Open Loop Gain and
Phase Margin vs. Frequency
C
COMP
= 25 pF
Figure 14. Large Signal Frequency
Response
Figure 17. Input Noise Voltage
Spectral Density
Figure 12. Open-Loop Gain vs.
Supply Voltage
Figure 15. Output Swing and Error
vs. Settling Time
Figure 18. Slew Rate vs. Input
Error Signal