Datasheet

AD7376
Rev. D | Page 6 of 20
3-WIRE DIGITAL INTERFACE
Table 4. AD7376 Serial Data-Word Format
1
MSB LSB
D6 D5 D4 D3 D2 D1 D0
2
6
2
0
1
Data is loaded MSB first.
D6 D5 D4 D3 D2 D1 D0
1
SDI
0
1
CLK
0
1
CS
0
1
V
OUT
0
01119-002
RDAC REGISTER LOAD
Figure 2. AD7376 3-Wire Digital Interface Timing Diagram
(V
A
= V
DD
, V
B
= 0 V, V
W
= V
OUT
)
±1 LSB ERROR BAND
±1 LSB
t
S
t
CSW
t
CSH
t
CL
V
DD
V
OUT
0V
CS
0
1
t
CSH0
t
CSS
t
CH
0
1
1
0
1
SDI
(DATA IN)
SDO
(DATA OUT)
CLK
D
X
D
X
t
DS
t
DH
D'
X
D'
X
t
PD_MAX
t
CS1
01119-003
0
Figure 3. Detail Timing Diagram