Datasheet

AD7366/AD7367
Rev. D | Page 18 of 28
Unlike other bipolar ADCs, the AD7366/AD7367 do not have a
resistive analog input structure. On the AD7366/AD7367, the
bipolar analog signal is sampled directly onto the sampling
capacitor. This gives the AD7366/AD7367 high analog input
impedance. The analog input impedance can be calculated from
the following formula:
Z = 1/(f
S
× C
S
)
where:
f
S
is the sampling frequency.
C
S
is the sampling capacitor value.
C
S
depends on the analog input range chosen (see the Analog
Inputs section). When operating at 1 MSPS, the analog input
impedance is typically 260 kΩ for the ±10 V range. As the
sampling frequency is reduced, the analog input impedance
further increases. As the analog input impedance increases, the
current required to drive the analog input therefore decreases
(see Figure 7 for more information).
TYPICAL CONNECTION DIAGRAM
Figure 20 shows a typical connection diagram for the AD7366/
AD7367. In this configuration, the AGND pin is connected
to the analog ground plane of the system, and the DGND pin
is connected to the digital ground plane of the system. The
analog inputs on the AD7366/AD7367 accept bipolar single-
ended signals. The AD7366/AD7367 can operate with either
an internal or an external reference. In Figure 20, the AD7366/
AD7367 are configured to operate with the internal 2.5 V reference.
A 680 nF decoupling capacitor is required when operating with
the internal reference.
The AV
CC
and DV
CC
pins are connected to a 5 V supply voltage.
The V
DD
and V
SS
are the dual supplies for the high voltage analog
input structures. The voltage on these pins must be equal to or
greater than ±11.5 V (see Table 7 for more information). The
V
DRIVE
pin is connected to the supply voltage of the microprocessor.
The voltage applied to the V
DRIVE
input controls the voltage of
the serial interface. V
DRIVE
can be set to 3 V o r 5 V.
AD7366/
AD7367
MICROCONTROLLER/
MICROPROCESSOR
CS
V
DRIVE
10µF0.1µF
+ +
+3V OR +5V SUPPLY
+11.5V TO +16.5V
SUPPLY
–16.5V TO –11.5V
SUPPLY
+5V SUPPLY
DV
CC
AV
CC
BUSY
CNVST
REFSEL
V
DRIVE
D
CAP
A
D
CAP
B
ADDR
ANALOG INPUTS ±10V,
±5V, AND 0V TO +10V
680nF
680nF
SCLK
D
OUT
A
D
OUT
B
DGND
AGND
V
SS
V
B1
V
B2
V
A1
V
DD
V
A2
10µF 0.1µF
+
+
0.1µF
+
10µF
+
0.1µF
+
SERIAL
INTERFACE
10µF
+
0.1µF
+
+
+
RANGE1
RANGE0
06703-022
Figure 20. Typical Connection Diagram Using Internal Reference