Datasheet

REV. A

AD73360

–17–

Table XIII. Control Register G Description

76543210

SEEN RMOD CH6 CH5 CH4 CH3 CH2 CH1

Bit Name Description

0 CH1 Channel 1 Select

1 CH2 Channel 2 Select

2 CH3 Channel 3 Select

3 CH4 Channel 4 Select

4 CH5 Channel 5 Select

5 CH6 Channel 6 Select

6 RMOD Reset Analog Modulator

7 SEEN Enable Single-Ended Input Mode

Table XIV. Control Register H Description

76543210

INV TME CH6 CH5 CH4 CH3 CH2 CH1

Bit Name Description

0 CH1 Channel 1 Select

1 CH2 Channel 2 Select

2 CH3 Channel 3 Select

3 CH4 Channel 4 Select

4 CH5 Channel 5 Select

5 CH6 Channel 6 Select

6 TME Test Mode Enable

7 INV Enable Invert Channel Mode

CONTROL REGISTER G

CONTROL REGISTER H

Control Register A

CRA:0 Data/Program Mode. This bit controls the operating mode of the AD73360. If CRA:1 is 0, then a 0 in this bit

places the part in Program Mode. If CRA:1 is 0, then a 1 in this bit places the part in Data Mode.

CRA:1 Mixed Mode. If this bit is a 0, then the operating mode is determined by CRA:0. If this bit is a 1, then the

part operates in Mixed Mode.

CRA:2 Reserved. This bit is reserved and should be programmed to 0 to ensure correct operation.

CRA:3 SPORT Loop Back. This is a diagnostic mode. This bit should be set to 0 to ensure correct operation.

CRA:4–6 Device Count Bits. These bits tell the AD73360 how many devices are used in a cascade. All devices in the

cascade should be programmed to the same value ensure correct operation. See Table XVIII.

CRA:7 Reset. Writing a 1 to this bit will initiate a software reset of the AD73360.

Control Register B

CRB:0–1 Decimation Rate. These bits are used to set the decimation of the AD73360. See Table VII.

CRB:2–3 Serial Clock Divider. These bits are used to set the serial clock frequency. See Table VI.

CRB:4–6 Master Clock Divider. These bits are used to set the Master Clock Divider ratio. See Table V.

CRB:7 Control Echo Enable. Setting this bit to a 1 will cause the AD73360 to write out any control words it receives.

This is used as a diagnostic mode. This bit should be set to 0 for correct operation in Mixed Mode or Data Mode.