Datasheet

AD7304/AD7305
Rev. C | Page 9 of 20
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
OUT
A
V
SS
V
REF
DB7
LDAC
GND
V
OUT
B
V
OUT
D
V
DD
A0/SHDN
DB0
WR
A1
DB4
DB5
DB6
DB3
DB2
DB1
V
OUT
C
AD7305
TOP VIEW
(Not to Scale)
01114-009
Figure 9. AD7305 Pin Configuration
Table 8. AD7305 Pin Function Description
Pin No. Mnemonic Description
1 V
OUT
B
Channel B Rail-to-Rail Buffered DAC Voltage Output. Full-scale set by reference voltage applied to V
REF
B pin. Output is
open circuit when SHDN is enabled.
2 V
OUT
A
Channel A Rail-to-Rail Buffered DAC Voltage Output. Full-scale set by reference voltage applied to V
REF
A pin. Output is
open circuit when SHDN is enabled.
3 V
SS
Negative Power Supply Input. Specified range of operation is 0 V to –5.5 V.
4 V
REF
Channel B Reference Input. Establishes V
OUT
full-scale voltage. Specified range of operation is V
SS
< V
REF
< V
DD
.
5 GND Common Analog and Digital Ground.
6
LDAC
Load DAC Register Strobe, Active Low. Simultaneously transfers data from all four input registers into the
corresponding DAC registers. Asynchronous active low input. DAC register is transparent when
LDAC = 0. See Table 6
for operation.
7 DB7 MSB Digital Input Data Bit.
8 DB6 Data Bit 6.
9 DB5 Data Bit 5.
10 DB4 Data Bit 4.
11 DB3 Data Bit 3.
12 DB2 Data Bit 2.
13 DB1 Data Bit 1.
14 DB0 LSB Digital Input Data Bit.
15
WR
Write Data into Input Register Control Line, Active Low. See Table 6 for operation.
16 A1 Address Bit 1.
17 A0/SHDN
Address Bit 0/Hardware Shutdown (SHDN) Control Input, Active When Pin Is Left Floating by a Three-State Logic
Driver. Does not effect DAC register contents as long as power is present on V
DD
.
18 V
DD
Positive Power Supply Input. Specified range of operation is 2.7 V to 5.5 V.
19 V
OUT
D
Channel D Rail-to-Rail Buffered DAC Voltage Output. Full-scale set by reference voltage applied to V
REF
D pin. Output is
open circuit when SHDN is enabled.
20 V
OUT
C
Channel C Rail-to-Rail Buffered DAC Voltage Output. Full-scale set by reference voltage applied to V
REF
C pin. Output is
open circuit when SHDN is enabled.