Datasheet

AD7303
–7–
REV. 0
T
←
DAC A = NORMAL OPERATION
DAC B INITIALLY IN POWER
DOWN
1
2
V
OUT
B
SYNC
DAC B EXITING
POWER DOWN
CH1 2V, CH2 5V, M 500ns
V
DD
= +5V
INTERNAL REFERENCE
T
A
= 258C
Figure 12. Exiting Power-Down
(Partial Power-Down)
Input Code (10 to 245)
INL ERROR – LSB
0 25532 64 96 128 160 192 224
DAC B
DAC A
V
DD
= +5V
INTERNAL REFERENCE
5kΩ 100pF LOAD
LIMITED CODE RANGE (10-245)
T
A
= 25°C
–0.5
0.4
0.1
–0.1
–0.3
–0.4
0.3
0.2
0
–0.2
0.5
Figure 15. Integral Linearity Plot
I
DD
– mA
050.5 1 1.5 2 2.5 3 3.5 4 4.5
4
0
7
6
2
1
5
3
V
DD
= +5V
V
DD
= +3V
Figure 13. Supply Current vs.
Logic Input Voltage
V
DD
= +5V
INTERNAL REFERENCE
0.5
0.4
0.3
0.2
0.1
0
–0.1
–0.2
–0.3
–0.4
–0.5
–60 –40 –20 0 20 40 60 80 100 120 140
INL ERROR – LSB
TEMPERATURE – 8C
Figure 16. Typical INL vs.
Temperature
2
1
V
OUT
CH1 5.00V, CH2 50.0mV, M 250ns
SYNC
V
DD
= +5V
INTERNAL VOLTAGE
REFERENCE
10 LSB STEP CHANGE
T
A
= 258C
Figure 14. Small Scale Settling
Time
V
DD
= +5V
INTERNAL REFERENCE
0.5
0.4
0.3
0.2
0.1
0
–0.1
–0.2
–0.3
–0.4
–0.5
–60 –40 –20 0 20 40 60 80 100 120 140
TEMPERATURE – 8C
DNL ERROR – LSB
Figure 17. Typical DNL vs.
Temperature
TEMPERATURE – 8C
500
400
200
100
0
300
–50 0
50 100 150
V
DD
= +5.5V
V
IL
AND V
IH
= 0V OR V
DD
POWER-DOWN CURRENT – nA
–25 25 75 125
Figure 19. Power-Down Current vs.
Temperature
V
DD
= +5V
0.6
0.4
0.2
0
–60 –40 –20 0 20 40 60 80 100 120 140
TEMPERATURE – 8C
INT REFERENCE ERROR – 6%
0.8
1.0
Figure 18. Typical Internal Reference
Error vs. Temperature