Datasheet

AD7302
–8–
REV. 0
1
2
V
O
B
M20.0ms
V
O
A
V
DD
3
CH1
CH3
5.00V
5.00V
CH2 5.00V CH1
T
T
T
Figure 11. Power-On—RESET
INPUT CODE (10 to 245)
INL ERROR – LSB
0
256
32 64 96 128 160 192 224
DAC B
DAC A
V
DD
= 5V
INTERNAL REFERENCE
5kΩ 100pf. LOAD
LIMITED CODE RANGE (10–245)
T
A
= +25°C
–0.5
0.4
0.1
–0.1
–0.3
–0.4
0.3
0.2
0
–0.2
0.5
Figure 14. Integral Linearity Plot
–25
4
0
7
6
2
1
5
3
8
9
10
–50 0 25 50 75 100 125
TEMPERATURE – C
DAC A
DAC B
ZERO CODE ERROR – LSB
V
DD
= 2.7 TO 5.5V
DAC LOADED WITH ALL ZEROES
INTERNAL REFERENCE
Figure 12. Zero Code Error vs.
Temperature
V
DD
= 5V
INTERNAL REFERENCE
0.5
0.4
0.3
0.2
0.1
0
–0.1
–0.2
–0.3
–0.4
–0.5
–60 –40 –20 0 20 40 60 80 100 120 140
INL ERROR – LSB
TEMPERATURE – 8C
Figure 15. Typical INL vs. Temperature
2
←
1 ←
WR
V
OUT
V
DD
= 5V
INTERNAL VOLTAGE
REFERENCE
10 LSB STEP CHANGE
T
A
= +258C
CH1 5.00V, CH2 50.0mV, M 250ns
Figure 13. Small-Scale Settling Time
V
DD
= 5V
INTERNAL REFERENCE
0.5
0.4
0.3
0.2
0.1
0
–0.1
–0.2
–0.3
–0.4
–0.5
–60 –40 –20 0 20 40 60 80 100 120 140
TEMPERATURE – 8C
DNL ERROR – LSB
Figure 16. Typical DNL vs. Temperature
V
DD
= 5V
0.6
0.4
0.2
0
–60 –40 –20 0 20 40 60 80 100 120 140
TEMPERATURE – 8C
INT REFERENCE ERROR – 6%
0.8
1.0
Figure 17. Typical Internal Reference
Error vs. Temperature
TEMPERATURE – C
0
–50 –25
0 100 125
V
DD
= 5V
LOGIC INPUTS = V
DD
OR GND
100
200
300
400
500
600
700
800
900
1000
25 50 75
POWER-DOWN CURRENT – nA
Figure 18. Power-Down Current vs.
Temperature