Datasheet

AD7298-1
Rev. A | Page 4 of 24
Parameter Min Typ Max Unit Test Conditions/Comments
LOGIC OUTPUTS
Output High Voltage, V
OH
V
DRIVE
− 0.3 V V
DRIVE
< 1.8
V
DRIVE
− 0.2 V V
DRIVE
≥ 1.8
Output Low Voltage, V
OL
0.4 V
Floating State Leakage Current ±0.01 ±1 μA
Floating State Output Capacitance
3
8 pF
CONVERSION RATE
Conversion Time 1 t
2
+ (16 × t
SCLK
) μs For V
IN0
to V
IN7
with one cycle latency
Track-and-Hold Acquisition Time
2, 3
100 ns Full-scale step input
Throughput Rate 1 MSPS
f
SCLK
= 20 MHz; for analog voltage
conversions, one cycle latency
POWER REQUIREMENTS Digital inputs = 0 V or V
DRIVE
V
DD
2.8 3 3.6 V
V
DRIVE
1.65 3 3.6 V
I
TOTAL
5
V
DD
= 3.6 V, V
DRIVE
= 3.6 V
Normal Mode (Operational) 5.8 6.4 mA
Normal Mode (Static) 4.1 4.6 mA
Partial Power-Down Mode 2.7 3.3 mA
Full Power-Down Mode 1 1.6 μA T
A
= −40°C to +25°C
10 μA T
A
= −40°C to +125°C
Power Dissipation
6
Normal Mode (Operational) 17.4 19.2 mW V
DD
= 3 V, V
DRIVE
= 3 V
23 mW
Normal Mode (Static) 14.8 16.6 mW
Partial Power-Down Mode 9.8 11.9 mW
Full Power-Down Mode 3.6 5.8 μW T
A
= −40°C to +25°C
36 μW T
A
= −40°C to +125°C
1
All specifications expressed in decibels are referred to full-scale input FSR and tested with an input signal at 0.5 dB below full scale, unless otherwise specified.
2
See the Terminology section.
3
Sample tested during initial release to ensure compliance.
4
Refers to the V
REF
pin specified for 25°C.
5
I
TOTAL
is the total current flowing in V
DD
and V
DRIVE
.
6
Power dissipation is specified with V
DD
= V
DRIVE
= 3.6 V, unless otherwise noted.